<div class="entry-content">
    <div class="jetpack-video-wrapper"><span class="embed-youtube" style="text-align:center; display: block;"><iframe src="https://www.youtube.com/embed/fFI33f4TejM" class="youtube-player" width="740" height="416.418" frameborder="0" allowfullscreen></iframe></span>
    </div>
    <div class="blog-content">
Ken Burns has published 7 hardware projects on Kickstarter. He explains how it works.
    </div>
    
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="https://tinycircuits.com/">Ken's company TinyCircuits</a></li>
            <li class="links-list-item"><a href="https://fedevel.com/courses">FEDEVEL Online courses</a></li>
        </ul>
    </div>  
</div>

Can You Make Money on Kickstarter HW Projects?

<div class="entry-content">
    <div class="jetpack-video-wrapper"><span class="embed-youtube" style="text-align:center; display: block;"><iframe src="https://www.youtube.com/embed/2oA4X3OTz0M" class="youtube-player" width="740" height="416.418" frameborder="0" allowfullscreen></iframe></span>
    </div>
    <div class="blog-content">
Interesting experiments and examples to help you to understand ground layout in PCB. Explained by Hans Rosenberg
    </div>


    <div class="blog-content-chapters">
        <div>
            Chapters:
        </div>
        <ul class="chapters-list">
            <li class="chapters-list-item"><span class="chapters-time">00:00</span><span class="chapters-text">What is this video about</span></li>
            <li class="chapters-list-item"><span class="chapters-time">00:19</span><span class="chapters-text">Currents flow under track</span></li>
            <li class="chapters-list-item"><span class="chapters-time">03:10</span><span class="chapters-text">What happen when you are making a board</span></li>
            <li class="chapters-list-item"><span class="chapters-time">08:37</span><span class="chapters-text">Where currents flow</span></li>
            <li class="chapters-list-item"><span class="chapters-time">14:01</span><span class="chapters-text">Experiment: Cut under track</span></li>
            <li class="chapters-list-item"><span class="chapters-time">19:51</span><span class="chapters-text">Floating copper fill</span></li>
            <li class="chapters-list-item"><span class="chapters-time">23:15</span><span class="chapters-text">Grounded copper fill</span></li>
            <li class="chapters-list-item"><span class="chapters-time">27:04</span><span class="chapters-text">Experiment: Filter</span></li>
            <li class="chapters-list-item"><span class="chapters-time">35:05</span><span class="chapters-text">2 Layer vs. 4 Layer</span></li>
            <li class="chapters-list-item"><span class="chapters-time">44:00</span><span class="chapters-text">3 rules to prevent ground problems</span></li>
            <li class="chapters-list-item"><span class="chapters-time">46:05</span><span class="chapters-text">Example: Ground plane</span></li>
            <li class="chapters-list-item"><span class="chapters-time">49:52</span><span class="chapters-text">Example: 1 VIA per GND pin</span></li>
            <li class="chapters-list-item"><span class="chapters-time">54:46</span><span class="chapters-text">Example: Gap in GND plane</span></li>
            <li class="chapters-list-item"><span class="chapters-time">1:02:00</span><span class="chapters-text">Example: FPGA board redesign</span></li>
            <li class="chapters-list-item"><span class="chapters-time">1:05:16</span><span class="chapters-text">Star grounding</span></li>
            <li class="chapters-list-item"><span class="chapters-time">1:07:39</span><span class="chapters-text">Multiple ground planes</span></li>
            <li class="chapters-list-item"><span class="chapters-time">1:14:30</span><span class="chapters-text">Example: Digital and Analog on one board</span></li>
            <li class="chapters-list-item"><span class="chapters-time">1:16:40</span><span class="chapters-text">About Hans</span></li>
    </div>
    
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="https://www.youtube.com/@HansRosenberg74">Hans´ YouTube</a></li>
            <li class="links-list-item"><a href="https://www.hans-rosenberg.com/">Hans´ website</a></li>
            <li class="links-list-item"><a href="https://fedevel.com/courses">FEDEVEL Online courses</a></li>
        </ul>
    </div>  
</div>

Examples of BAD Ground in PCB Layout And How to Fix It

<div class="entry-content">
    <div class="jetpack-video-wrapper"><span class="embed-youtube" style="text-align:center; display: block;"><iframe src="https://www.youtube.com/embed/X-qubBLJDD8" class="youtube-player" width="740" height="416.418" frameborder="0" allowfullscreen></iframe></span>
    </div>
    <div class="blog-content">
What will happen if you don't have enough GND pins on your connector?
    </div>
    
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="https://www.colorado.edu/faculty/bogatin/">About Eric</a></li>
            <li class="links-list-item"><a href="https://fedevel.com/courses">FEDEVEL Online courses</a></li>
        </ul>
    </div>  
</div>

Do You Design Connector Pinout Correctly? | Eric Bogatin

<div class="entry-content">
    <div class="jetpack-video-wrapper"><span class="embed-youtube" style="text-align:center; display: block;"><iframe src="https://www.youtube.com/embed/I6N_mphgKiY" class="youtube-player" width="740" height="416.418" frameborder="0" allowfullscreen></iframe></span>
    </div>
    <div class="blog-content">
        This video has been taken when I was doing DDR2 layout using Altium Designer. I usually use Cadence Allegro and I had to improvise a little bit this time.
    </div>
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="http://www.fedevel.com/welldoneblog/2010/11/ddr2-length-calculator-spreadsheet-used-for-altium-designer/">Spreadsheet what I used during the layout</a></li>
            <li class="links-list-item"><a href="http://www.fedevel.com/welldoneblog/2011/07/altium-designer-ddr3-routing-and-pcb-layout-video/">Altium Designer – DDR3 routing and PCB layout video</a></li>
            <li class="links-list-item"><a href="http://www.fedevel.com/welldoneblog/2011/12/altium-designer-ddr2-ddr3-length-matching/">Altium Designer – DDR2 / DDR3 length matching</a></li>
        </ul>
    </div>  
</div>


Altium Designer – DDR2 routing and layout video

<div class="entry-content">

    <div class="blog-content">
        DDR, DDR2 and DDR3 memory reference layouts can be found on <a href="http://www.jedec.org/standards-documents/technology-focus-areas/memory-module-design-file-registrations">JEDEC website</a>. They provide schematics and PCB brd files (requires registration). It’s very useful to see how JEDEC does the layout.
    </div>

    <div class="blog-content-text">
        For example see difference in address routing (yellow colour) for DDR2 (T-branch topology) and DDR3 (fly-by topology) :
        <ul class="content-list">
            <li class="content-list-item"><span class="content-text"><b><a href="https://www.jedec.org/standards-documents/focus/memory-module-designs-dimms/DDR2/240-pin Unbuffered DIMMs">Design Files for DDR2 240-pin Unbuffered DIMMs</a></b>
        </ul>       
    </div>
    
    <div class="blog-content-text">
        <i>Picture: <a href="http://www.jedec.org/sites/default/files/docs/design/DDR2/PC2-6400_UDIMM_V12_RC_H0_20050803.zip">DDR2 2 Rank x16 example</a></i>
    </div>
    <div class="blog-content-img-wrapper">
        <img src="https://assets.fedevel.com/blog/2019/10/0dcbd-ddr2-layout-example.jpg" alt="DDR2 layout example" />
    </div>

    <div class="blog-content-text">
        <ul class="content-list">
            <li class="content-list-item"><span class="content-text"><b><a href="http://www.jedec.org/standards-documents/focus/memory-module-designs-dimms/DDR3/240-pin Unbuffered DIMMs">Design Files for DDR3 240-pin Unbuffered DIMMs</a></b>
        </ul>       
    </div>
    
    <div class="blog-content-text">
        <i>Picture: <a href="http://www.jedec.org/sites/default/files/docs/design/DDR3/PC3_10600_UDIMM_V050_RC_F0_20070530.zip">DDR3 2 Rank x16 planar example</a></i>
    </div>
    <div class="blog-content-img-wrapper">
        <img src="https://assets.fedevel.com/blog/2019/10/ea62b-ddr3-layout-example.jpg" alt="DDR3 layout example" />
    </div>

    <div class="blog-content-text">
        You will need <a href="http://www.cadence.com/products/pcb/Pages/downloads.aspx">Allegro FREE Physical Viewer</a> (free, but requires registration) to open the brd files. In case you have never used Allegro before, you may want to watch <a href="https://fedevel.com/blog/very-simple-tutorial-how-to-start-with-cadence-allegro/">Very simple tutorial – How to start with Cadence Allegro</a>.
    </div>

    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="http://www.jedec.org/standards-documents/technology-focus-areas/memory-module-design-file-registrations">JEDEC website</a></li>
            <li class="links-list-item"><a href="http://www.jedec.org/standards-documents/focus/memory-module-designs-dimms/DDR3/240-pin Unbuffered DIMMs">Design Files for DDR3 240-pin Unbuffered DIMMs</a></li>
            <li class="links-list-item"><a href="http://www.jedec.org/sites/default/files/docs/design/DDR2/PC2-6400_UDIMM_V12_RC_H0_20050803.zip">DDR2 2 Rank x16 example</a></li>
            <li class="links-list-item"><a href="http://www.jedec.org/standards-documents/focus/memory-module-designs-dimms/DDR3/240-pin Unbuffered DIMMs">Design Files for DDR3 240-pin Unbuffered DIMMs</a></li>
            <li class="links-list-item"><a href="http://www.jedec.org/sites/default/files/docs/design/DDR3/PC3_10600_UDIMM_V050_RC_F0_20070530.zip">DDR3 2 Rank x16 planar example</a></li>
            <li class="links-list-item"><a href="http://www.cadence.com/products/pcb/Pages/downloads.aspx">Allegro FREE Physical Viewer</a></li>
            <li class="links-list-item"><a href="https://fedevel.com/blog/very-simple-tutorial-how-to-start-with-cadence-allegro/">Very simple tutorial – How to start with Cadence Allegro</a></li>
        </ul>
    </div>  
</div>

DDR, DDR2 and DDR3 – PCB layout examples

<div class="entry-content">
    <div class="jetpack-video-wrapper"><span class="embed-youtube" style="text-align:center; display: block;"><iframe src="https://www.youtube.com/embed/kPv3-zWlzms" class="youtube-player" width="740" height="416.418" frameborder="0" allowfullscreen></iframe></span>
    </div>
    <div class="blog-content">
        How to print assembly drawing or selected layers only? I believe, you will find this video useful.
    </div>
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="http://www.fedevel.com/welldoneblog/2011/06/altium-designer-how-to-creat-assembly-drawing-layers/">Altium Designer – How to Create Assembly Drawing Layers</a></li>
        </ul>
    </div>  
</div>


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