How to fanout DDR3 Memory from CPU
I was very happy to write a post for Altium.
Do you plan ahead when working on CPU DDR3 fanout?
Choosing the correct VIA for a particular memory group and deciding on how PCB layers will be used can make DDR3 layout a lot easier. Assigning different colors to each memory group help visualize the interface.
Why to use uVIAs instead of through hole VIAs for Address, Command and Control signals?
The Address, Command and Control group has the highest number of signals from the memory groups. If we chose through hole VIAs, we would use a lot of space on all the layers. By choosing uVIAs, we only need the space on the Layer 3 and because uVIA is smaller in diameter, we also have more space to fanout the signals on Layer 3.
