<div class="entry-content">
    <div class="jetpack-video-wrapper"><span class="embed-youtube" style="text-align:center; display: block;"><iframe src="https://www.youtube.com/embed/fFI33f4TejM" class="youtube-player" width="740" height="416.418" frameborder="0" allowfullscreen></iframe></span>
    </div>
    <div class="blog-content">
Ken Burns has published 7 hardware projects on Kickstarter. He explains how it works.
    </div>
    
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="https://tinycircuits.com/">Ken's company TinyCircuits</a></li>
            <li class="links-list-item"><a href="https://fedevel.com/courses">FEDEVEL Online courses</a></li>
        </ul>
    </div>  
</div>

Can You Make Money on Kickstarter HW Projects?

<div class="entry-content">
    <div class="jetpack-video-wrapper"><span class="embed-youtube" style="text-align:center; display: block;"><iframe src="https://www.youtube.com/embed/2oA4X3OTz0M" class="youtube-player" width="740" height="416.418" frameborder="0" allowfullscreen></iframe></span>
    </div>
    <div class="blog-content">
Interesting experiments and examples to help you to understand ground layout in PCB. Explained by Hans Rosenberg
    </div>


    <div class="blog-content-chapters">
        <div>
            Chapters:
        </div>
        <ul class="chapters-list">
            <li class="chapters-list-item"><span class="chapters-time">00:00</span><span class="chapters-text">What is this video about</span></li>
            <li class="chapters-list-item"><span class="chapters-time">00:19</span><span class="chapters-text">Currents flow under track</span></li>
            <li class="chapters-list-item"><span class="chapters-time">03:10</span><span class="chapters-text">What happen when you are making a board</span></li>
            <li class="chapters-list-item"><span class="chapters-time">08:37</span><span class="chapters-text">Where currents flow</span></li>
            <li class="chapters-list-item"><span class="chapters-time">14:01</span><span class="chapters-text">Experiment: Cut under track</span></li>
            <li class="chapters-list-item"><span class="chapters-time">19:51</span><span class="chapters-text">Floating copper fill</span></li>
            <li class="chapters-list-item"><span class="chapters-time">23:15</span><span class="chapters-text">Grounded copper fill</span></li>
            <li class="chapters-list-item"><span class="chapters-time">27:04</span><span class="chapters-text">Experiment: Filter</span></li>
            <li class="chapters-list-item"><span class="chapters-time">35:05</span><span class="chapters-text">2 Layer vs. 4 Layer</span></li>
            <li class="chapters-list-item"><span class="chapters-time">44:00</span><span class="chapters-text">3 rules to prevent ground problems</span></li>
            <li class="chapters-list-item"><span class="chapters-time">46:05</span><span class="chapters-text">Example: Ground plane</span></li>
            <li class="chapters-list-item"><span class="chapters-time">49:52</span><span class="chapters-text">Example: 1 VIA per GND pin</span></li>
            <li class="chapters-list-item"><span class="chapters-time">54:46</span><span class="chapters-text">Example: Gap in GND plane</span></li>
            <li class="chapters-list-item"><span class="chapters-time">1:02:00</span><span class="chapters-text">Example: FPGA board redesign</span></li>
            <li class="chapters-list-item"><span class="chapters-time">1:05:16</span><span class="chapters-text">Star grounding</span></li>
            <li class="chapters-list-item"><span class="chapters-time">1:07:39</span><span class="chapters-text">Multiple ground planes</span></li>
            <li class="chapters-list-item"><span class="chapters-time">1:14:30</span><span class="chapters-text">Example: Digital and Analog on one board</span></li>
            <li class="chapters-list-item"><span class="chapters-time">1:16:40</span><span class="chapters-text">About Hans</span></li>
    </div>
    
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="https://www.youtube.com/@HansRosenberg74">Hans´ YouTube</a></li>
            <li class="links-list-item"><a href="https://www.hans-rosenberg.com/">Hans´ website</a></li>
            <li class="links-list-item"><a href="https://fedevel.com/courses">FEDEVEL Online courses</a></li>
        </ul>
    </div>  
</div>

Examples of BAD Ground in PCB Layout And How to Fix It

<div class="entry-content">
    <div class="jetpack-video-wrapper"><span class="embed-youtube" style="text-align:center; display: block;"><iframe src="https://www.youtube.com/embed/X-qubBLJDD8" class="youtube-player" width="740" height="416.418" frameborder="0" allowfullscreen></iframe></span>
    </div>
    <div class="blog-content">
What will happen if you don't have enough GND pins on your connector?
    </div>
    
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="https://www.colorado.edu/faculty/bogatin/">About Eric</a></li>
            <li class="links-list-item"><a href="https://fedevel.com/courses">FEDEVEL Online courses</a></li>
        </ul>
    </div>  
</div>

Do You Design Connector Pinout Correctly? | Eric Bogatin

<div class="entry-content">
    <div class="blog-content">
        The x86 use often three chip solution, but it’s not a rule. Mobile platforms many time use only two chips. The chips used to be known as CPU (to support different CPU speeds and models), North Bridge (mostly memory interface + graphic interface or graphics), South Bridge (peripherals). These days manufacturers use different names such GMCH, SCH, PCH, … <br><br>

        <i>Picture: <a href="http://www.intel.com/p/en_US/embedded/hwsw/hardware/atom-n270/overview">Intel N270</a> (Three chips) / <a href="http://www.intel.com/p/en_US/embedded/hwsw/hardware/atom-z5xx/overview">Intel ATOM Z5xx</a> / <a href="http://ark.intel.com/Product.aspx?id=52213">Intel CORE i7</a></i>
    </div>

    <div class="blog-content-img-wrapper">
        <img src="https://assets.fedevel.com/blog/2019/10/9db6d-intel_n270_arch1.jpg" alt="Intel N270" />
    </div>
    <div class="blog-content-img-wrapper">
        <img src="https://assets.fedevel.com/blog/2019/10/0be04-intel_atom_arch1.jpg" alt="Intel ATOM Z5xx" />
    </div>
    <div class="blog-content-img-wrapper">
        <img src="https://assets.fedevel.com/blog/2019/10/0cb53-intel_i7_arch1.jpg" alt="Intel Core i7" />
    </div>

    <div class="blog-content-text">
       <b>Power sequencing</b><br>
       x86 boards support <a href="http://en.wikipedia.org/wiki/Advanced_Configuration_and_Power_Interface">several power states</a>. The most well know are:
       <ul class="content-list">
            <li class="content-list-item"><span class="content-text">S0 – Board is ON</span></li>
            <li class="content-list-item"><span class="content-text">S3 – Board is in Sleep (when you close your laptop, without shutting down)</span></li>
            <li class="content-list-item"><span class="content-text">S5 – Board is OFF, but can be switched pressing Power button</span></li>
            <li class="content-list-item"><span class="content-text">G3 – Disconnected from Main power</span></li>
        </ul>
        Power rails are split into several power domains: by voltage (+5V, +3.3V, …) and by power state (S0, S3, …). For example +3.3V rail is split into: +V3.3A (Always ON or also know as S5), +V3.3 (S3) and +V3.3S (S0).<br><br>

        More about power states: see <a href="http://www.acpi.info/DOWNLOADS/ACPIspec40a.pdf">ACPI specification</a><br><br>

        Power sequencing is controlled by South Bridge. Mobile platforms use a <a href="https://www.intelcommsalliance.com/kshowcase/view/view_item/4ddd1dbe78eb6b235cc4f07eabb79ae562ae690e">Embedded controller</a> instead. The embedded controller integrates often also other features – keyboard interface, volume control, ambient light sensor for automatic display backlight control, …
    </div>

    
    <div class="blog-content-text">
        <b>High Currents & High Heat</b><br>
        When designing a x86 board, it’s important to know how a lot of heat will be taken away. Power supplies are designed to support currents up to tens of Amps. PCB layout has to take this into consideration and wide tracks / planes + multiple VIAs are required for power tracks.
     </div>

     
    <div class="blog-content-text">
        <b>BIOS</b><br>
        BIOS development is one of the key parts of x86 board development. It’s done by BIOS companies (<a href="http://www.phoenix.com/">Phoenix</a> (Award), <a href="http://www.insydesw.com/home">Insyde</a>, … ) or by BIOS developers (they own a licence to source code of BIOS). Basic BIOS binaries are provided together with development platform, but must be customized based on the new board design. BIOS customization may easily cost around $900 per day.<br><br>

        Manufacturers of peripheral chips provide binaries for BIOS e.g Video BIOS, Ethernet BIOS (to support booting over Ethernet …), SATA BIOS (to support RAIDS …).<br><br>

        Open source BIOSes are also available – for example <a href="http://www.coreboot.org/Welcome_to_coreboot">Coreboot</a> (formerly known as LinuxBIOS)<br><br>

        A replacement for the older BIOS has been developed. The replacemnt is known as <a href="http://en.wikipedia.org/wiki/Unified_Extensible_Firmware_Interface">UEFI</a> and is supported by several big manufacturers such Intel, AMD, IBM …
     </div>

     
    <div class="blog-content-text">
        <b>Booting</b><br>
        Initially, BIOS is executed directly from BIOS FLASH memory. Once system memory has been initialized (together with some other code),  the BIOS starts running from DDR.
     </div>

     
    <div class="blog-content-text">
        <b>BIOS Debugging</b><br>
        Before video interface is initialized, a serial console or JTAG can be used to debug BIOS. Standard BIOS diagnostic output is called <a href="http://www.postcodemaster.com/">POST code</a>. This code differentiate between manufacturers. BIOS POST code is a two/four digits hex value written by BIOS software on port 0x80. For easier diagnostic, this code can be read by <a href="http://www.google.sk/search?hl=en&client=firefox-a&hs=o0H&rls=org.mozilla%3Aen-GB%3Aofficial&biw=1440&bih=635&tbm=isch&sa=1&q=POST+Diagnostic+card&aq=f&aqi=g1&aql=&oq=">POST code diagnostic cards</a>.<br><br>

        Do you have any questions or you think something else is also important? Leave a comment.
     </div>

   
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="http://www.intel.com/p/en_US/embedded/hwsw/hardware/atom-n270/overview">Intel N270</a></li>
            <li class="links-list-item"><a href="http://www.intel.com/p/en_US/embedded/hwsw/hardware/atom-z5xx/overview">Intel ATOM Z5xx</a></li>
            <li class="links-list-item"><a href="http://ark.intel.com/Product.aspx?id=52213">Intel CORE i7</a></li>
            <li class="links-list-item"><a href="http://en.wikipedia.org/wiki/Advanced_Configuration_and_Power_Interface">Several power states</a></li>
            <li class="links-list-item"><a href="http://www.acpi.info/DOWNLOADS/ACPIspec40a.pdf">ACPI specification</a></li>
            <li class="links-list-item"><a href="https://www.intelcommsalliance.com/kshowcase/view/view_item/4ddd1dbe78eb6b235cc4f07eabb79ae562ae690e">Embedded controller</a></li>
            <li class="links-list-item"><a href="http://www.phoenix.com/">Phoenix</a></li>
            <li class="links-list-item"><a href="http://www.insydesw.com/home">Insyde</a></li>
            <li class="links-list-item"><a href="http://www.coreboot.org/Welcome_to_coreboot">Coreboot</a></li>
            <li class="links-list-item"><a href="http://en.wikipedia.org/wiki/Unified_Extensible_Firmware_Interface">UEFI</a></li>
            <li class="links-list-item"><a href="http://www.postcodemaster.com/">POST code</a></li>
            <li class="links-list-item"><a href="http://www.google.sk/search?hl=en&client=firefox-a&hs=o0H&rls=org.mozilla%3Aen-GB%3Aofficial&biw=1440&bih=635&tbm=isch&sa=1&q=POST+Diagnostic+card&aq=f&aqi=g1&aql=&oq=">POST code diagnostic cards</a></li>
        </ul>
    </div>  
</div>

x86 Hardware design – What everyone should know

<div class="entry-content">
    <div class="blog-content">
        The best high speed design tutorial for PCB layout in Altium Designer what I have found. It’s worth to have a look.<br><br>

        <i><b>High-Speed Digital Board Design with Altium Designer</b> by Istvan Nagy, Electronics Design Engineer, Blue Chip Technology. (<a href="https://assets.fedevel.com/blog/downloads/HiSpeedDesignTutorialforAltiumDesigner.pdf" target="_blank">download pdf here</a>)<br><br>

        Picture: A page from the tutorial</i>
    </div>

    <div class="blog-content-img-wrapper">
        <img src="https://assets.fedevel.com/blog/2019/10/0c528-altium_designer_high_speed_tutorial.jpg" alt="altium_designer_high_speed_tutorial" />
    </div>

   
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="https://assets.fedevel.com/blog/downloads/HiSpeedDesignTutorialforAltiumDesigner.pdf" target="_blank">High-Speed Digital Board Design with Altium Designer - PDF file</a></li>
        </ul>
    </div>  
</div>

Altium Designer – High Speed Design Tutorial

<div class="entry-content">
    <div class="jetpack-video-wrapper"><span class="embed-youtube" style="text-align:center; display: block;"><iframe src="https://www.youtube.com/embed/IFLviz722ws" class="youtube-player" width="740" height="416.418" frameborder="0" allowfullscreen></iframe></span>
    </div>

    <div class="blog-content">
        This video tutorial shows how I use micro VIA and  blind VIA in Altium Designer during PCB layout (HDI PCB Technology).
    </div>

    <div class="jetpack-video-wrapper"><span class="embed-youtube" style="text-align:center; display: block;"><iframe src="https://www.youtube.com/embed/OaefGeQrRkA" class="youtube-player" width="740" height="416.418" frameborder="0" allowfullscreen></iframe></span>
    </div>



    <div class="blog-content-text">
       <b><span style="color:#ff0000;">Updated:</span></b> Have a look also on the following video created
            by <a href="http://www.youtube.com/user/elektroniskorg">Elektroniskorg</a>. The video explains how to configure
            Altium Designer Rules for automatic VIA selection during interactive routing. Thank you for a great tutorial.
    </div>

   
    <div class="blog-content-links">
        <div>
            Links:
        </div>
        <ul class="links-list">
            <li class="links-list-item"><a href="http://www.youtube.com/user/elektroniskorg">Elektroniskorg</a></li>
        </ul>
    </div>  
</div>

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