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Creating IPC compilant reliable foorprints:
nachodizz990 , 08-12-2016, 03:38 PM
Dear all Fedevel members, i want to share a way i learn yesterday to create IPC-7351B footprints, this not applies to processor BGA´s, connectors and extrange footprints, for this cases follow manufacturer instructions.
I will create an example footprint for S25FL128S FPGA (SOIC16) eeprom.
1) Download this progrtam from IPC: http://www.ipc.org/ContentPage.aspx?...ern-Calculator
2) Download the datasheet: http://www.cypress.com/documentation...mory-datasheet
3) Download this step Model: http://www.3dcontentcentral.com/secu...=171&id=190720
4) Open the program you recently downloaded and click on surface mount (upper toolbar)
5) Select SOIC and then, click OK
6) Open the datasheet and go to page 39 of 144 (SOIC-16) to see the manufacturer dimensions
7) Now select min/max and fill only the 2 most right data WITH THE DATASHEET DATA, (plus the pitch and pin count)
8) Click OK, then double click on pin 16 and click on pad stack, now we have all required data for creating the component.
9) Open Altium to start a New blank component (footprint) and set the global snap grid to 1.27mm,
- Place a pad over the origin and change it to Layer 1, rectangular and insert the x size and y size from the upper IPC data ( 0.6 X, 1.9 Y )
10) Now ( with the global snap grid to 1.27mm) copy 7 pads to the right.
- After that, copy all the 8 pads and paste it a little bit more above the copied pads
- Now go to edit, set reference, center
11) Open the PCBLIB INSPECTOR and with the 8 upper pads selected insert the IPC 2016 Y offset data ,
- Do the same for the bottom pads
12) Now you have the footprint, so lets draw a 0.2 mm silkscreen line, place the 3d step model over the origin.
- Rotate the model 180º Z axis, and set standoff height to 1.42mm
13) JOB DONE
I will create an example footprint for S25FL128S FPGA (SOIC16) eeprom.
1) Download this progrtam from IPC: http://www.ipc.org/ContentPage.aspx?...ern-Calculator
2) Download the datasheet: http://www.cypress.com/documentation...mory-datasheet
3) Download this step Model: http://www.3dcontentcentral.com/secu...=171&id=190720
4) Open the program you recently downloaded and click on surface mount (upper toolbar)
5) Select SOIC and then, click OK
6) Open the datasheet and go to page 39 of 144 (SOIC-16) to see the manufacturer dimensions
7) Now select min/max and fill only the 2 most right data WITH THE DATASHEET DATA, (plus the pitch and pin count)
8) Click OK, then double click on pin 16 and click on pad stack, now we have all required data for creating the component.
9) Open Altium to start a New blank component (footprint) and set the global snap grid to 1.27mm,
- Place a pad over the origin and change it to Layer 1, rectangular and insert the x size and y size from the upper IPC data ( 0.6 X, 1.9 Y )
10) Now ( with the global snap grid to 1.27mm) copy 7 pads to the right.
- After that, copy all the 8 pads and paste it a little bit more above the copied pads
- Now go to edit, set reference, center
11) Open the PCBLIB INSPECTOR and with the 8 upper pads selected insert the IPC 2016 Y offset data ,
- Do the same for the bottom pads
12) Now you have the footprint, so lets draw a 0.2 mm silkscreen line, place the 3d step model over the origin.
- Rotate the model 180º Z axis, and set standoff height to 1.42mm
13) JOB DONE
nachodizz990 , 08-12-2016, 03:44 PM
The FINAL RESULT
Now try the KSZ9031 Ethernet phy and compare the results with the recommended land pattern
Now try the KSZ9031 Ethernet phy and compare the results with the recommended land pattern
robertferanec , 08-13-2016, 12:31 AM
Nice examples!
nachodizz990 , 08-13-2016, 01:23 AM
Thank you @robertferanec , but THIS PROGRAM FAILS for example with some footprints such as the FT232RQ (QFN), for this cases i think that it´s better to follow manufacturer´s recommended land pattern
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