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xddarko , 12-31-2019, 08:34 AM

Greetings everyone,

A couple of months ago, I worked on my first 4 layer PCB layout project that includes driving stepper motors, sensing temperatures, and heating elements through high current MOSFETS. I looked for some reference designs and found that some did it using 2 layers only. Personally I did not like that because when I looked into the design, I found that high current is passing through narrow traces rather than polygons which is the most recommended way in my opinion because the current can reach a maximum value of 15A. Using a dedicated layer for ground(s) and another for supply voltages seemed as a more robust and secure way. Thermally way better too.

After doing the whole layout, I generated the Gerber files and started contacting manufacturers. I noticed that a set of 5 PCBs will cost somewhere between 100$ and 150$ . So I thought to myself maybe I can reduce the cost further but what can I do to do that? I made sure to use the minimum vias as possible. I used 0.3mm holes for vias and kept my distance from special requirements. (Can I increase the drill size without increasing the cost? ) In the end when I reviewed my design more critically, I guess I used a lot of vias especially in the power section of the board in order to securely conduct high current from layer 1 to layer 2 or 3 . sometimes I use multiple vias to conduct current to internal planes and most of the time I use them for signals as well when I cannot find a solution for routing.

Can you help me figure out how to reduce the cost or suggest a better approach maybe ? Thank you.

Lakshmi , 01-01-2020, 07:46 PM

Hi @@xddarko Try to write it in points,It'll be easy to read.
You can not expect the lower cost in a 4 Layer unless you go with JLC PCB((Cheap Material). The price may be under 100$.


It looks like your board size is more than 50*50mm.
May I know your layer stack up?
Even I'd suggest you go for 4 Layer as long as you're worried about EMI else you can get away with 2 Layer also.
I don't think using more via will increase by a large amount of cost.
PS: You always (MUST) consult a manufacturer and then start the design(LAYOUT).

Thanks and Regards,
Lakshminarayana.

IMPORTANCE OF BOARD STACK-UP
https://resources.altium.com/altiuml...board-stack-up

robertferanec , 01-02-2020, 02:35 AM

The cheap PCB manufacturers have price break also in size of PCB e.g. 50x50mm PCB costs same as 100x100mm PCB, but 110x100mm costs almost double. But I am not sure how much you are flexible on that.

PS: I think, number of standard VIAs doesn't play any role in PCB cost anymore.


50x50mm -> 49USD



100x100mm => 49USD



110x100mm => 96USD

xddarko , 01-02-2020, 03:41 PM

Well...My board is considerably big I suppose....It's sized 158*115 mm. Besides size, I bailed on JLCPCB because they do not support Blind Vias used to connect signal layers to internal gnd and supply planes last time I checked.
As for my stack up I played by the manufacturers rules and applied their stackups mentioned in the capabilities (eg: pcbway) .
Do I need to change them with every quotation request for a different manufacturer?

The layers are:
L1 : Signal
L2: AGND, DGND
L3: 12V , 5V
L4: Signal

I was thinking of changing via sizes from 0.3mm holes to 0.4 and minimizing blind vias.

Lakshmi , 01-02-2020, 08:50 PM

Hi @@xddarko,
Have you gone through the "IMPORTANCE OF BOARD STACK UP"? Do you still want to have the same stack-up?
Even PCB Manufacturer/Fab. house will have their rules like min trace width, trace to a pad, pad to pad separation, Via hole diameter and Pad size and Buried via and blind via.
For eg, most of the manufacturers have min trace width and separation of 4mils, Via hole diameter of 0.3mm and Pad size of 0.6mm. As long as you're within this range you can get manufactured in most of Fab house But you need to check with Material used also.

Yeah JLC can not do blind and buried via Manfct.

I don't see any use of blind vias in a 4 Layer stack up as long you keep the same stack-up. Blind vias are costlier as they're mostly laser-drilled Try to avoid if your concern is on the cost.

Thanks.
Lakshminarayana K N.

robertferanec , 01-03-2020, 01:44 AM

I agree with @Lakshmi - in your PCB it may not be necessary to use blind VIAs. Blind VIAs are usually used in very high density designs or in PCB with small pitch BGAs where is no other way to design it. Blind VIAs will make your PCB unnecessary more expensive (your PCB is very large with a lot of space, through hole VIAs should be just fine). At least - that is what I would do - I would not used blind VIAs in design like this.

xddarko , 01-03-2020, 10:00 AM

min trace width, trace to a pad, pad to pad separation, Via hole diameter and Pad size and Buried via and blind via (rules and layer stack) are configured according to the manufacturer's capabilities so that's not the problem I guess. The problem is that I used so many blind vias if I think about it. But I do not understand how it is not necessary to use them when I needed them for connecting pads and pins to the GND layer and supply layer when I have no other way to connecting them. For example I use many blind vias to connect high current power and other regulated voltage to layer 3 dedicated to supply voltages. Or to use vias to connect MOSFET thermal sinks to gnd layer. I also used polygons to connect many same power signals together (gnd and 5V and 12V-15A) then transfering that same signal polygon to the corresponding layer via multiple blind vias for good current transfer.
I think the fact that I did not know during the layout is that blind vias are very costly and did not avoid them as I should especially in digital signals.

robertferanec , 01-03-2020, 10:08 AM

You can connect through hole VIA to any layer you need. Once the through hole is drilled, they do Plating - in this process copper is place inside of VIA and this plating will connect any layers inside VIA where copper goes to the edge of the hole.

Lakshmi , 01-03-2020, 08:20 PM

You need to go through a lot of open-source designs and some of the resources and try to learn from their design.
Before you use, understand how things work, advantage and disadvantages.
For eg,

Keep learning

Thanks.

xddarko , 01-05-2020, 02:37 PM

@robertferanec That is the answer I was looking for as much as it's embarrassing lol Thank you! But how can I do it in Altium? I mean creating a via from layer1 to layer 4 connecting internal planes?
@Lakshmi That is what I intend to do thank you !

robertferanec , 01-06-2020, 09:01 AM

You do not have to do anything special, when routing, simply placing a through hole VIA will automatically connect everything the right way: https://www.youtube.com/watch?v=hmD4EtEF2sQ

xddarko , 01-10-2020, 03:01 PM

Thanks @robertferanec Everything is good with VIAs DRC too until I encountered the constraint of solder bridges in JLCPCB. They do not support that when I checked. And I GUESS they should be done between my 8-bit atmega AVR pads for soldering right? Should I go to another manufacturer? Anyone comparable to JLC in mind? Thank you again.

robertferanec , 01-11-2020, 07:28 AM

Could you attach pictures what exactly was the problem on your PCB? I am not 100% sure what you mean - do you mean like your PCBs had short circuits? (I have used JLCPCB in past and I was satisfied)

xddarko , 01-11-2020, 08:22 AM

In this IC I need soldermask bridges between the pads to be able to solder it properly later by myself (and avoid short circuits) but JLC do not support this feature as you can see in their site. Am I thinking about this the right way?

robertferanec , 01-13-2020, 12:50 AM

I am not exactly sure if they mean some specific bridges, but normally you can get solder mask between pins if you leave the mask sliver at least 0.1mm wide (of course I can not guarantee this, but usually I have them on PCBs). This is the PCB I received from JLC and as you can see, there is blue solder mask between the pins.

xddarko , 01-14-2020, 04:55 PM

Thank you for the reassurance! 1mm sounds perfect for me But this also depends on the solder mask expansion and they do not mention any minimum requirement about it. I've put 2mils for solder mask expansion and 1mm for the minimum solder mask sliver in the Rules and when I run the DRC, a warning in minimum solder mask sliver appears . Because simply, the 1mm rule is not respeced (distance lower than 1mm) due to close pads (0.5mm) . If I reduce the solder mask expansion, this warning should go away but I am worried about their capabilities. I contacted their support and am waiting for a reply.

robertferanec , 01-15-2020, 05:56 AM

I use 0.1mm minimum sliver, no 1mm.

xddarko , 01-16-2020, 07:05 AM

Yes I meant 0.1mm .
I just received a mail from JLC and said the expansion should be a minimum of 0.18mm and as for the minimum sliver, they said they can do a minimum of 0.2mm for green solder mask. Looking at the photos you sent (which are great), I think they just recommend a 0.2mm for maximum assurance. Even so, with a 0.18mm expansion rule, a 0.1mm solder mask between pads will be reduced even more. I guess I will have to switch to allpcb or pcbway.