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Questions for "How to create Filters & Rules EASY" lesson
gyuunyuu1989 , 10-07-2023, 07:32 PM
Robert has created a video on youtube "Altium: How to create Filters & Rules EASY (+ 8 Useful Examples)". I have several questions about this content covered in this video.
This video covers the topic of Altium query language which is also mentioned in the Altium document AR0129 "An Insider's Guide to the Query Language". The query langauge is used to filter components from schematic or the PCB to select them or apply rules to them.
For start, these are my first questions:
1. Is it true that the Altium Query language is not case sensitive?
2. Now lets take an example from Altium:
The attached image shows the window where we assign clearance rules. We have two spaces here "Where the first object matches" and "Where the second object matches". This is followed by the constraints section which has a matrix for "Track, SMD pad, TH pad, Via, Copper, Text, Hole".
2.a. Why do we need to have two sections where we can create query? Isn't just a signle "Where the first object matches" enough at all?
2.b. So we can assign two things under "Where the first object matches" and then "Where the second object matches". But then we also have the matrix. Why do we need a matrix as well? We can just assign the values using "Where the first object matches" followed by "Where the second object matches" and then a clearance value right?
The reason for confusion is, when we have a "Where the first object matches" that can contain a query and then a "Where the second object matches" that can also contain a query and then also a matix containing "Track, SMD pad, TH pad, Via, Copper, Text, Hole". How do we really know what we are assigning clearance for?
3. Do other programs like Cadence Allegro, OrCAD and KiCAD also contain this SQL sort of query langauge?
This video covers the topic of Altium query language which is also mentioned in the Altium document AR0129 "An Insider's Guide to the Query Language". The query langauge is used to filter components from schematic or the PCB to select them or apply rules to them.
For start, these are my first questions:
1. Is it true that the Altium Query language is not case sensitive?
2. Now lets take an example from Altium:
The attached image shows the window where we assign clearance rules. We have two spaces here "Where the first object matches" and "Where the second object matches". This is followed by the constraints section which has a matrix for "Track, SMD pad, TH pad, Via, Copper, Text, Hole".
2.a. Why do we need to have two sections where we can create query? Isn't just a signle "Where the first object matches" enough at all?
2.b. So we can assign two things under "Where the first object matches" and then "Where the second object matches". But then we also have the matrix. Why do we need a matrix as well? We can just assign the values using "Where the first object matches" followed by "Where the second object matches" and then a clearance value right?
The reason for confusion is, when we have a "Where the first object matches" that can contain a query and then a "Where the second object matches" that can also contain a query and then also a matix containing "Track, SMD pad, TH pad, Via, Copper, Text, Hole". How do we really know what we are assigning clearance for?
3. Do other programs like Cadence Allegro, OrCAD and KiCAD also contain this SQL sort of query langauge?
qdrives , 10-08-2023, 02:17 PM
1. The language itself is not case sensitive. However, if you use string compare (or selection), that may be case sensitive.
2a. No. Clearance is a distance between two objects. So you must be able to specify those two objects. However, >60% of clearance rules will just have one specified and the other set to all.
2b. It is true that you can add the object type (track, pad, etc.) in the selection, but that would create many more rules. In old version of Altium there was no table, so I had to create many rules. With the table the number of rules could perhaps be half.
If you take the IPC-2221 rules for clearance, you have the various condition like B4 (solder resist over tracks) and A6 (uncoated component lead). B4 is lower than A6.
Now you can translate A6 to SMD and TH pads and perhaps even via's (if they are not guaranteed covered by solder resist, ie filled and covered). Most other objects (like track, arcs, polygons, copper) will probably be covered with solder resist and fall in the B4 category.
Now lets assume you have a 24V net on your board. IPC states that A6 needs to be at least 0.25mm and A4 at least 0.05mm. For fabrication you need at least 0.1mm.
This will create a rule "InNetClass('24V') - All" and have SMD and TH pads set to 0.25mm and copper (simple) set to 0.1mm.
If you set the solder mask expansion for via's to 0.05mm from the hole, 0.2mm hole size and 0.5mm pad size, that wil give you 0.1mm covered from the outer edge.
In this case, the covered part and 0.1mm will give you 0.2mm. To another B4 object that would not be a problem, but if it is a A6 object (pad), the clearance needs to be 0.15mm in order to meet the 0.25mm between bare copper elements.
That gives you 3 different distances for a single netclass.
Now for a list of (old) rules that I created over the years. I highlighted some where both the scopes were used.
There the clearance for 110V (150V IPC) A6 would be 0.8mm, or as I had set them to 1.6mm (IEC 60664). That did not allow me to use a 0603 gate resistor for the MOSFETs. However, as the voltage difference between those nets would be low (22 ohm resistor), I created these multiple netclasses (110V, 110A and 110B) that would allow me to do so without violations.
3. I was told that KiCad has something like rules, but not as fancy as Altium. This was a couple of years ago, so things may have changed.
Eagle has the ability to use netclasses with a single clearance. The table like clearance is only for the general set.
2a. No. Clearance is a distance between two objects. So you must be able to specify those two objects. However, >60% of clearance rules will just have one specified and the other set to all.
2b. It is true that you can add the object type (track, pad, etc.) in the selection, but that would create many more rules. In old version of Altium there was no table, so I had to create many rules. With the table the number of rules could perhaps be half.
If you take the IPC-2221 rules for clearance, you have the various condition like B4 (solder resist over tracks) and A6 (uncoated component lead). B4 is lower than A6.
Now you can translate A6 to SMD and TH pads and perhaps even via's (if they are not guaranteed covered by solder resist, ie filled and covered). Most other objects (like track, arcs, polygons, copper) will probably be covered with solder resist and fall in the B4 category.
Now lets assume you have a 24V net on your board. IPC states that A6 needs to be at least 0.25mm and A4 at least 0.05mm. For fabrication you need at least 0.1mm.
This will create a rule "InNetClass('24V') - All" and have SMD and TH pads set to 0.25mm and copper (simple) set to 0.1mm.
If you set the solder mask expansion for via's to 0.05mm from the hole, 0.2mm hole size and 0.5mm pad size, that wil give you 0.1mm covered from the outer edge.
In this case, the covered part and 0.1mm will give you 0.2mm. To another B4 object that would not be a problem, but if it is a A6 object (pad), the clearance needs to be 0.15mm in order to meet the 0.25mm between bare copper elements.
That gives you 3 different distances for a single netclass.
Now for a list of (old) rules that I created over the years. I highlighted some where both the scopes were used.
There the clearance for 110V (150V IPC) A6 would be 0.8mm, or as I had set them to 1.6mm (IEC 60664). That did not allow me to use a 0603 gate resistor for the MOSFETs. However, as the voltage difference between those nets would be low (22 ohm resistor), I created these multiple netclasses (110V, 110A and 110B) that would allow me to do so without violations.
3. I was told that KiCad has something like rules, but not as fancy as Altium. This was a couple of years ago, so things may have changed.
Eagle has the ability to use netclasses with a single clearance. The table like clearance is only for the general set.
gyuunyuu1989 , 10-09-2023, 03:43 PM
Thanks but I am a bit confused.
Yes, the clearance rule is between 2 things. The first thing would be the would specified under "Where the first object matches" (could be set to Any) and then the second thing would be "Track, SMD pad, TH pad, Via, Copper, Text, Hole". This is how we could assign clearance between two things. So why does "Where the second object matches" exist?
Yes, the clearance rule is between 2 things. The first thing would be the would specified under "Where the first object matches" (could be set to Any) and then the second thing would be "Track, SMD pad, TH pad, Via, Copper, Text, Hole". This is how we could assign clearance between two things. So why does "Where the second object matches" exist?
qdrives , 10-10-2023, 01:58 PM
No, the first thing is for instance all 24V nets (netclass is "+24V") and the second is analog signals (netclass "analog").
For pads you want 2mm clearance, for tracks and arcs 0.5 and from polygons 0.8mm.
But yes, you do not often use both scopes as in most cases it is netclass "+24V" (to use the previous example) compared to the rest.
And you do so in priority order. So you start with 220V, than 48V followed by 24V and finally it is your logic <= 10V.
But let me ask you a question: how many voltages do you have on your board that are higher than 10V(dc)?
If your answer is "none", than you may just have one single rule and use the table.
For pads you want 2mm clearance, for tracks and arcs 0.5 and from polygons 0.8mm.
But yes, you do not often use both scopes as in most cases it is netclass "+24V" (to use the previous example) compared to the rest.
And you do so in priority order. So you start with 220V, than 48V followed by 24V and finally it is your logic <= 10V.
But let me ask you a question: how many voltages do you have on your board that are higher than 10V(dc)?
If your answer is "none", than you may just have one single rule and use the table.
gyuunyuu1989 , 10-10-2023, 04:36 PM
I actually don't even have a board right now 
but was just trying to understand what this stuff means since I took notes from that video from Robert.
but was just trying to understand what this stuff means since I took notes from that video from Robert.qdrives , 10-11-2023, 01:20 PM
Another possible reason for two is where you want higher clearance from signal to signal, but signal to Gnd or signal to power may be small.
You could do this to reduce the cross talk between the signals.
You could do this to reduce the cross talk between the signals.
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