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Platform forum

Al , 03-03-2025, 05:11 PM

Hi all,

I am currently working on a schematic for an Advanced Digital Hardware Design course by Philip Salmony and have encountered an issue when trying to connect nets across different pages of my schematic.

Specifically, I am trying to connect signals like DDR_CKE from one page to another, but I am getting errors related to duplicate net names for Wire_CKE. My design is flat, and I am unsure how to correctly connect these nets without causing conflicts.

Has anyone encountered a similar issue before? What is the correct way to connect nets across multiple pages in a flat design? Any guidance or best practices would be greatly appreciated!

Thanks in advance!

Denis , 03-03-2025, 05:21 PM

Hi Al,
I'm working on the scheme as well. I'm drawing it in the KiCad.
Not sure if it help with Altium (I dont have any practice with it).
I used Global Label for nets that need to use in different sheets.
Otherwise labels are visible only on one sheet.

Al , 03-03-2025, 05:26 PM

The netnames connect to sheets in Kicad diffrent compared to Altium. In Altium I have to use ports and off sheet connectors , but there is a better way to do it in Altium which I am not sure off. I looked at Roberts old schematics that I did for another training where he created schematic components where he defined each pin of the components as passive. I am using components where the pins are defined as either output, input or bi-directional.

Denis , 03-03-2025, 05:38 PM

Can you try to connect CKE signal in the same way as CLK_P and CLK_N?
If they dont have issue with net duplicate

Al , 03-03-2025, 06:08 PM

I have used a port with a net name like you suggested , and connect to DDR_CKE port on the other page to see if I get an error. So far the error has gone after I validated the project in Altium. If you see my page 11 , breaking the wire and adding nets to join them gets messy. The schematic does become neat like I wanted to in Philip Salmony schematic.

QDrives , 03-03-2025, 07:25 PM

In "Flat", if you want to connect signals from one sheet to another you have to use ports. Like you already have a lot of them.

Al , 03-03-2025, 09:40 PM

@Qdrivers, I have all my schematics as flat and not Hierarchical. I made changes to the Net Identifier scope as per your recommendations, but I am getting duplicate net names bus error. How do I correct them?

QDrives , 03-03-2025, 09:41 PM

You do not have to use the same settings as I do. It was merely to show where some settings are that play a role.

QDrives , 03-03-2025, 09:44 PM

And it is not the "schematic" that is flat, but your project.

QDrives , 03-03-2025, 09:46 PM

What is you get rid of one of the duplicate ports?

QDrives , 03-03-2025, 09:46 PM

Only have one port (with the same name) on a sheet.

Al , 03-03-2025, 09:49 PM

Oh, I see makes sense. I did not know about only one port (with the same name) on a sheet. Should I change the Net Identifier Scope under Project options to Flat (Only ports global) or Gllobal (Netlabels and ports global)?

Al , 03-03-2025, 09:50 PM

I changed to Global (Netlables and ports global) and many of my duplicate Net name errors are gone.

QDrives , 03-03-2025, 09:56 PM

It depends on how you want to design -- and a personal preference.