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716904 , 08-26-2026, 10:12 PM

Hello,#𝐐＆𝐀-forum I'm experiencing a flashing issue with an STM32G071G8U6: STM32CubeProgrammer (ST-LINK, SWD, Normal mode) returns "Unable to get core ID" / "No STM32 target found", even though the measured target voltage is correct (~2.93–2.97V, see attached screenshot). I'm also attaching the MCU pinout and SWD connector schematics for reference. I'd like to know what possible causes could explain a total loss of SWD communication despite the correct current voltage.

, 08-26-2026, 10:13 PM

🤖 In the meantime, here’s a response from the [FEDEVEL AI HW Assistant]().
It helps to find relevant resources for your question, but it may make mistakes as it’s still in early development.

This is the response from the AI Assistant:
Here's a structured approach to diagnose your STM32G071G8U6 SWD communication failure based on common hardware design issues covered in our STM32 tutorials:

**1. SWD Pin Configuration Check:**
- Verify PA13 (SWDIO) and PA14 (SWCLK) aren't being used for other functions (like GPIO or alternate peripherals). The MCU might be stuck in a state where SWD pins are disabled ([Reference: GPIO configuration in CubeMX](https://www.youtube.com/watch?v=dnfuNT1dPiM&t=1497))
- Confirm SWD connector has proper pull-ups (4.7kΩ typical) on SWDIO and NRST lines

**2. Reset Circuit Validation:**
- Check NRST pin voltage (should be ~3V when not asserted)
- Ensure reset circuit isn't being held low by external components
- Verify decoupling capacitor on NRST (100nF typical) isn't shorted ([Debug interface configuration](https://www.youtube.com/watch?v=dnfuNT1dPiM&t=2622))

**3. Power Sequencing:**
- Confirm all VDD/VSS pairs are properly connected (including VDDIO2)
- Check for voltage dips during programming attempts using oscilloscope
- Verify decoupling capacitors (100nF + 4.7µF combination) are present at every power pin pair

**4. Boot Mode Configuration:**
- Ensure BOOT0 pin is properly pulled low (≤0.3V) for normal boot mode
- Check for accidental solder bridges between BOOT0 and adjacent pins

**5. Clock Source Verification:**
- Confirm HSEC/LSEC oscillators aren't shorting SWD lines if used
- Check for proper crystal loading capacitors if using external oscillator

**6.

, 08-26-2026, 10:13 PM

Physical Layer Checks:**
- Measure SWDIO/SWCLK signals with oscilloscope (should show 1MHz clock activity)
- Verify cable length <15cm and proper impedance matching
- Check for cold solder joints using continuity test

**7. Firmware Interference:**
- If previously programmed, check for:
- Option bytes disabling SWD interface
- Low-power modes locking debug access
- Watchdog timers not being fed

**Troubleshooting Steps:**
1. Try connecting with NRST held low during power-up
2. Test with different SWD clock speeds (reduce to 100kHz in CubeProgrammer)
3. Validate ST-LINK firmware version (update if needed)
4. Attempt connection with all external peripherals disconnected

The video tutorials emphasize that proper SWD communication requires both electrical integrity and correct software configuration. Even with valid VDD, issues like floating reset pins or misconfigured option bytes can prevent core access.

For hardware validation, our [STM32 debugging tutorial](https://www.youtube.com/watch?v=dnfuNT1dPiM&t=4953) shows how to use signal analysis to verify SWD communication.

You can continue chatting with the AI Assistant here:
https://fedevel.com/hw-assistant

QDrives , 08-27-2026, 02:14 PM

NRST?
BOOT0?
And voltage of 2.93V while your schematic states 3.3V shows that something is wrong.

Robert Feranec , 08-31-2026, 10:19 AM

did you try to lower the speed?