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Effective Bulk (and Decoupling) Capacitor Placement
Beko , 05-23-2021, 01:43 AM
Hi,
I have always wondered the effectiveness of my decoupling capacitors or power line capacitors in general and I would appreciate if someone can enlighten me.
When you have a power plane and you start placing capacitors before your MCU pins following the "as-close-as-possible" rule, what happens is that the via that connects the MCU pin is usually right next to that pin. This means that the pin is directly connected to the power plane and the capacitors are usually further away due to space constraints. In this case does the capacitor really work as it should or is its effect reduced?
This case is especially obvious when you have a bulk capacitor. In that case, the bulk capacitor is usually placed somewhere on the board which could in fact be further away than the shortest power route for some pins. So is that bulk capacitor really effective?
If their effect is reduced, would it make sense to separate power planes for each MCU on the board from the general power plane. For example, if you have a 3.3V plane and you have a few MCUs that use 3.3V, would it make sense to separate their power planes and put a "net-tie" right after the bulk capacitor. (see attachment) This way we can separate the 3.3V planes and place a bulk capacitor at the entrance of the MCU power plane to make sure that the power route passes through the bulk capacitor.
OR is it unnecessary to do such thing and as long as the caps are close enough to the MCUs, then they would do their thing?
Related Question: Does it really matter whether the power line that goes to the pins passes through the capacitors before it reaches to the pin? (which is never the case with BGAs because the via that connects the pin to the power plane is always right next to pin and decoupling capacitor is simply connected to the via)
Thanks in advance for your replies.
Beko
I have always wondered the effectiveness of my decoupling capacitors or power line capacitors in general and I would appreciate if someone can enlighten me.
When you have a power plane and you start placing capacitors before your MCU pins following the "as-close-as-possible" rule, what happens is that the via that connects the MCU pin is usually right next to that pin. This means that the pin is directly connected to the power plane and the capacitors are usually further away due to space constraints. In this case does the capacitor really work as it should or is its effect reduced?
This case is especially obvious when you have a bulk capacitor. In that case, the bulk capacitor is usually placed somewhere on the board which could in fact be further away than the shortest power route for some pins. So is that bulk capacitor really effective?
If their effect is reduced, would it make sense to separate power planes for each MCU on the board from the general power plane. For example, if you have a 3.3V plane and you have a few MCUs that use 3.3V, would it make sense to separate their power planes and put a "net-tie" right after the bulk capacitor. (see attachment) This way we can separate the 3.3V planes and place a bulk capacitor at the entrance of the MCU power plane to make sure that the power route passes through the bulk capacitor.
OR is it unnecessary to do such thing and as long as the caps are close enough to the MCUs, then they would do their thing?
Related Question: Does it really matter whether the power line that goes to the pins passes through the capacitors before it reaches to the pin? (which is never the case with BGAs because the via that connects the pin to the power plane is always right next to pin and decoupling capacitor is simply connected to the via)
Thanks in advance for your replies.
Beko
robertferanec , 05-24-2021, 02:22 AM
That is a very complex topic to talk about .. I have been working on number of videos, which can help you to give some inside. But, there are no simple answers:
Beko , 06-03-2021, 10:09 PM
Hi Robert,
Thank you for your response. I watched your videos, they are great and kind of explains why some of our boards are having random problems meaning they work for 90% percent of the time but we get some weird response when we try to run a process... They also made me concerned due to the fact that it is almost impossible to go through all the simulation and measurement steps to find the right caps or problems in a typical fast-pace project and without all those tools/software that you are using. So, I was actually looking for some more rule-of-thumbs from experienced designers like yourself, such as the "as-close-as-possible" placement rule. Some suggestions that I could think of:
"Separate MCU power planes from the general power plane with a zero ohm resistor(?) or net-tie(?) and place your bulk capacitor next to the jumper/net-tie"
"Try to place your traces such that it passes through the capacitors before it goes to your MCU pins"
"Place ferrite beads before your decaps and close to the power entrance to the board"
Some of these are just common sense to me but I see reference designs that do not follow any of these, so are they really necessary or am I missing something?
And after all these rule-of-thumbs, if you still have issues with your board then of course you must measure and fix but how? Do you simply do trial-errors (like removing a ferrite bead in your video) to find the right caps?
I realize I am trying to simplify the issue, but what we need is some rules as starting point in designing our boards.
As always, thank you very much for your responses.
Regards
Beko
Thank you for your response. I watched your videos, they are great and kind of explains why some of our boards are having random problems meaning they work for 90% percent of the time but we get some weird response when we try to run a process... They also made me concerned due to the fact that it is almost impossible to go through all the simulation and measurement steps to find the right caps or problems in a typical fast-pace project and without all those tools/software that you are using. So, I was actually looking for some more rule-of-thumbs from experienced designers like yourself, such as the "as-close-as-possible" placement rule. Some suggestions that I could think of:
"Separate MCU power planes from the general power plane with a zero ohm resistor(?) or net-tie(?) and place your bulk capacitor next to the jumper/net-tie"
"Try to place your traces such that it passes through the capacitors before it goes to your MCU pins"
"Place ferrite beads before your decaps and close to the power entrance to the board"
Some of these are just common sense to me but I see reference designs that do not follow any of these, so are they really necessary or am I missing something?
And after all these rule-of-thumbs, if you still have issues with your board then of course you must measure and fix but how? Do you simply do trial-errors (like removing a ferrite bead in your video) to find the right caps?
I realize I am trying to simplify the issue, but what we need is some rules as starting point in designing our boards.
As always, thank you very much for your responses.
Regards
Beko
robertferanec , 06-05-2021, 03:14 AM
some of our boards are having random problems meaning they work for 90% percent of the time
What are the problems? I believe, most of the time it will be layout issue and it is not easy to fix it without a proper re-design.
For example, many times people underestimate how important is a solid GND plane .. or a proper placement ... or keeping proper space between tracks. People just try to design the cheapest boards with bad stackup and bad layout. Proper stackup will help a lot with noises, crosstalk, quality of signals .... and not following good stackup and layout that is what in many cases makes boards work 90%
Of course, this is not generic. Sometimes there really are problems in circuit itself or in component or in assembly, but when you are sure, that your circuit and components are correct and the board is still not working reliably, then the problem is usually PCB design itself.
PS: From my experience, if replacing a bead or capacitor appears to "fix" a problem, then it is usually not true. In most cases, the problem will appear again.
qdrives , 06-07-2021, 07:54 AM
@Beko watch video's and read blog post from Steve Sandler, Eric Bogatin and Rick Hartley.
You could do AC simulation in LTSpice where you also add parasitic property "components" (ie. trace inductance and plane capacitance). This way you can already check for anti resonance with the capacitors. But do use models of the capacitors (at the right DC bias).
You could do AC simulation in LTSpice where you also add parasitic property "components" (ie. trace inductance and plane capacitance). This way you can already check for anti resonance with the capacitors. But do use models of the capacitors (at the right DC bias).
Beko , 06-09-2021, 09:14 AM
Thank you all for your responses... I think I found most of rule of thumbs regarding decoupling cap placement in a Rick Hartley video... https://www.youtube.com/watch?v=icAZlvpiJCo&t=2907s
Really eye opening... but of course apart from the rule of thumbs, I do agree that modeling and measurement for diagnostics is necessary...
Really eye opening... but of course apart from the rule of thumbs, I do agree that modeling and measurement for diagnostics is necessary...
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