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Relay & High current PCB
tariq1996 , 10-24-2022, 08:49 AM
Hello everyone,
I have designed the below design for a smart pump to handle a nominal 220VAC with 8A and inrush current up to 35A.
In this design I have a four-layer, distributing the polygons for power Nets.
What do you think? is it a good design? or should I go for only a two-layer PCB?
TOP
2- LAYER:
3- LAYER:
BOTTOM:
Schematic:
Could you please help me out here, what do you think about the design?
Thank you very much....
I have designed the below design for a smart pump to handle a nominal 220VAC with 8A and inrush current up to 35A.
In this design I have a four-layer, distributing the polygons for power Nets.
What do you think? is it a good design? or should I go for only a two-layer PCB?
TOP
2- LAYER:
3- LAYER:
BOTTOM:
Schematic:
Could you please help me out here, what do you think about the design?
Thank you very much....
qdrives , 10-24-2022, 01:34 PM
1) Why all the vias?
2) 8A with 35um copper (1oz) on a 12mm wide track will cause 10 degrees C temperature rise (source https://saturnpcb.com/saturn-pcb-toolkit/)
3) Clearance for the 220Vac to secondary must be at least 6mm (Europe) and, as far as I know, more for UL (USA).
4) Clearance for 220V between line and neutral needs to be bigger.
5) Why the Normally Closed contact? Of that is not as capable for current compared to the normally open one.
6) The schematic of the mains connectors (IEC320 C13) shows 3 pins, whereas the PCB layout has 4. Two pairs, with each pair being shorted.
7) It also seems that the Line and Neutral are swapped between input and output.
8) Why the opto-coupler? Supply (signal) driving the input is connected to the output (Gnd and +5V0).
And yes, a two layer board would be ok here.
2) 8A with 35um copper (1oz) on a 12mm wide track will cause 10 degrees C temperature rise (source https://saturnpcb.com/saturn-pcb-toolkit/)
3) Clearance for the 220Vac to secondary must be at least 6mm (Europe) and, as far as I know, more for UL (USA).
4) Clearance for 220V between line and neutral needs to be bigger.
5) Why the Normally Closed contact? Of that is not as capable for current compared to the normally open one.
6) The schematic of the mains connectors (IEC320 C13) shows 3 pins, whereas the PCB layout has 4. Two pairs, with each pair being shorted.
7) It also seems that the Line and Neutral are swapped between input and output.
8) Why the opto-coupler? Supply (signal) driving the input is connected to the output (Gnd and +5V0).
And yes, a two layer board would be ok here.
tariq1996 , 10-24-2022, 01:53 PM
1. For better thermal relief.
2. Is that would be a problem?
3 & 4. Noted! Thabk you.
5. My application requires that NC is the normal case.
6. Right.
7. I don't think that would be a problem.
8. To maximise the isolation between HV & LV.
Thank you very much!
2. Is that would be a problem?
3 & 4. Noted! Thabk you.
5. My application requires that NC is the normal case.
6. Right.
7. I don't think that would be a problem.
8. To maximise the isolation between HV & LV.
Thank you very much!
qdrives , 10-25-2022, 02:59 PM
1) No, it does not help thermal relief. It may help with thermal conduction. Question then is: what gets hot?
2) Not a problem, but a that would allow a 2 layer board.
7) https://static-assets.imageservice.c...on-diagram.png
8) If the input for the opto-coupler comes from the same 5V supply that drives the output, then there is no additional isolation. In fact, as the return goes via a LED to Gnd, there is no isolation.
If you were to connect Gnd to PE, then at least there is the "protection" element. A short to line could trip the RCD switch.
2) Not a problem, but a that would allow a 2 layer board.
7) https://static-assets.imageservice.c...on-diagram.png
8) If the input for the opto-coupler comes from the same 5V supply that drives the output, then there is no additional isolation. In fact, as the return goes via a LED to Gnd, there is no isolation.
If you were to connect Gnd to PE, then at least there is the "protection" element. A short to line could trip the RCD switch.
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