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Best PCB Stack-Up Material for MIPI CSI,USB 2.0

chathurayasasvi , 08-06-2026, 06:20 AM
Hi everyone,

I'm looking for advice from experienced PCB designers regarding a commercial embedded product I'm developing. I've worked on hobby and small production boards before, but this project will be deployed professionally, so I would appreciate feedback on design choices.

### Project Overview

* 4-layer PCB
* Rockchip-based SBC (SoM)
* Ethernet PHY
* USB 2.0
* Ethernet camera
* I²C peripherals
* 12 V boost converter
* High-current IR LED driver (~10 W)
* Mixed digital, switching power, and analog signals

The PCB will be installed inside a sealed aluminum enclosure with a glass front. Under heavy AI/NPU workloads, the SBC can reach around 70–80°C. In the next revision, I plan to use the aluminum enclosure as a heatsink.

### 1. PCB Stack-up (7628 vs 3313)

I am currently using a 7628 prepreg stack-up for mechanical strength and easier manufacturing. However, many high-speed designs use 3313 due to thinner dielectric layers and easier impedance control.

For this design (USB 2.0, Ethernet, SBC, switching regulators), would you recommend staying with 7628 or moving to 3313?

Are there any significant advantages in signal integrity, EMC, reliability, or manufacturability?

### 2. Surface Finish

Would ENIG be the preferred choice for a production product with fine-pitch SMT components? I have mainly used HASL for prototypes but considering ENIG for better long-term reliability.

### 3. Chassis Grounding

Currently, I have one mounting hole connecting PCB ground to the aluminum enclosure.

* Is a single chassis connection good practice?
* Should the mounting hole be directly connected to GND?
* Or should it use RC/ferrite/capacitive coupling for EMC/ESD?

Any advice on stack-up selection, thermal design, grounding, or EMC considerations would be greatly appreciated.

Thanks!
, 08-06-2026, 06:23 AM
🤖 In the meantime, here’s a response from the [FEDEVEL AI HW Assistant]().
It helps to find relevant resources for your question, but it may make mistakes as it’s still in early development.

This is the response from the AI Assistant:
Here's my analysis based on the video content from Fedevel Academy's expert discussions:

### 1. PCB Stack-up Recommendation (3313 vs 7628)
For your mixed-signal design with USB 2.0 (480 Mbps) and Ethernet:
- **Use 3313 stack-up** for better signal integrity ([source](https://www.youtube.com/watch?v=Lqc1jmbSxnE&t=171))
- Thin dielectrics (0.099mm/3.9mil) enable:
- Narrower 50Ω traces (6mil vs 13mil in 7628)
- Reduced crosstalk through tighter field containment
- Better impedance control for differential pairs
- Maintain solid ground planes adjacent to signal layers (L2 & L3 in 4-layer) to minimize EMI ([source](https://www.youtube.com/watch?v=52fxuRGifLU&t=2869))
- For manufacturing: 3313 is standard at JLCPCB and other major fab houses. Mechanical strength can be compensated with proper mounting/constraints.

### 2. Surface Finish
- **ENIG recommended** for production:
- Better for fine-pitch components (flat surface)
- Superior shelf life vs HASL
- Required for tight-pitch BGAs in Rockchip SoM
- (Note: No direct video reference - general best practice)

### 3. Chassis Grounding
- **Avoid single-point ground** ([source](https://www.youtube.com/watch?v=gHF5JyJF-N4&t=6174))
- Recommended approach:
1. Use multiple mounting holes (≥4) with:
- 1-10nF capacitors (RF grounding)
- Parallel ferrite beads (ESD protection)
- 1MΩ resistors (static discharge)
2. Implement via fence around board perimeter (5-10mm spacing)
3.
, 08-06-2026, 06:23 AM
Keep digital ground separate from chassis ground except at filtered points

### Additional Recommendations from Videos:
- **Thermal Management**:
- Use thermal vias under SoM (0.3mm drill, 0.15mm annular ring)
- Consider 2oz copper for power layers
- Use thermal interface material between PCB and enclosure

- **EMC Considerations**:
- Keep switching converters (boost/LED driver) >5cm from sensitive analog
- Use split ground planes only for isolated power domains ([source](https://www.youtube.com/watch?v=aAB6qMQwykg&t=1937))
- Add stitching vias every λ/10 (≈3mm for 1GHz) near high-speed signals

- **Manufacturing**:
- Specify impedance control (+/-10%) for USB/Ethernet
- Use tear drops for via transitions
- Request 30% copper balance per layer

For stack-up validation, use Altium's Layer Stack Manager with your fab house's material data ([source](https://www.youtube.com/watch?v=nshfdrw9lbc&t=3670)).

You can continue chatting with the AI Assistant here:
https://fedevel.com/hw-assistant
Robert Feranec , 08-07-2026, 11:48 AM
1) I prefer 3313 because ground is closer to signal layers on top and bottom if L2 and L3 are ground.
Robert Feranec , 08-07-2026, 11:49 AM
2) I use usually ENIG for important boards
Robert Feranec , 08-07-2026, 11:51 AM
3) I dont know. But for PCB boards that I normally design I connect metal enclosure directly to board GND. There is usually multiple points where it is connected e.g. not only mounting holes but also shielded metal connectors will be touching the enclosure.
chathurayasasvi , 08-11-2026, 11:02 AM
Thank you very much @Robert Feranec
I was thinking to use this stackup due to space constraints
L1 - Signal
L2 - GND
L3 - PWR (3.3V copper fill)
L4 - Signal ( with GND copper fill )

I will be routing all the important lines on the top layer. Is that okay ?
Robert Feranec , 08-12-2026, 07:06 AM
i dont know if it is ok, but i sometimes do it that way, but if it is possible i try to have two GND planes in middle
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