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DP83848 Schematic Design Review
dangcaominh , 02-06-2025, 12:26 PM
Hello guys. It would be a great honor to me if you can spend your precious time reviewing this DP83848 Ethernet PHY design for me. I can make any mistake while designing and your feedback means a lot to me. The MCU interfacing with DP83848 is STM32F407VGT6 and all the nets that are under some blankets is marked with a parameter set as follow: Impedance constaint: min = 90, max = 110, matched net length 20ps. Thanks!
dangcaominh , 02-08-2025, 04:34 AM
@Robert Feranec can you have a quick review for me sir? Thank you
QDrives , 02-08-2025, 10:25 PM
A quick review is no review.Reviewing takes time. Too much time.
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