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Cyclone V and LPDDR2 Help
corlas , 08-15-2024, 01:17 PM
Hello,
I am currently designing an FPGA module that has a 5CGXFC5C6F23I7N FPGA and one IS43LD32320C-25BLI LPDDR2 memory.
I wanted to change some DQ bits in the group (for example, in DQ [7:0] change DQ4 with DQ6), but Quartus didn't want to compile the project and the compilation was only successful if nothing was changed (DQ[15:0] was connected to DQ[15:0])
Is there any chance that this FPGA does not support bit swapping?
corlas , 08-15-2024, 01:56 PM
ok, nevermind, I think I got it. Quartus needs normal pinout without swapping but I can swap it on the RAM side. Idk why its a problem for quartus but I think I fixed it.
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