About the issue to manufacture a motherboard
mulfycrowh , 08-31-2023, 05:44 PM
Hi everyone,
I am facing trouble with my motherboard again.
I succeeded in having it on 12 layers with vias 4020 for the smallest ones.
The previous version was based on 16 layers with vias 3615 and blind vias: I heard manufacturers shouting that it was not doable or ask for the amount of $85k for 5 prototypes.
Important to say it involved Megtron6 being a little afraid about the loss between MXM GPU and CPU (PCIe).
Megtron6 is very very very expensive and if you can get rid of it, it is a good idea.
After discussion with TI and following an article I found on the web and the length of the DPs of about 30 cm, I can use FR4.
I changed the stackup with a total height of 2,33mm, enlarged the gap for HDMI DPs in order to get a width of 90um.
So everything is above 90um including on BGAs I have with a pitch of 0.5mm and balls of 0.25mm.
I shared this last version yesterday with the first manufacturer.
Answer: NOT DOABLE!
You have to change your drills to 5030 because of the aspect ratio.
2.33/0.2 = 11.65 too high!
Wouaaaahhhhhh.....
I asked to another manufacturer the following questions:
If we consider 2 adjacent vias with different signals,
I would like to know:
- The minimal distance between the border of each via
- The minimal distance between the center of each via
- The minimal annular ring for each via
Drill holes: two cases: 0.2 mm and 0.3 mm
Answer:
For milling the distance is 200um from board edge to copper. However if the boards are in a scored panel then the space is 500um
For 0.2mm the distance is 400um for 0.3mm the distance is 600um
Minimum annular ring is 100um
OK I took 2 adjacent vias 5030 whose centers are distant of 600um, following what I was told.
The annular ring is 100um, OK.
The issue is that the distance between edge copper is 100um and not 200 um.
So there is an issue within the answer I got.
As you can see on the screenshot, the fanout of the CEX module is not obvious because you have DPs between DPs on other layers.
The spacing with the vias is better than 100um.
I cannot change the stackup because if I decrease the total height, the width of DPs will decrease too and go below 90um and perhaps 75um.
Under 75um, the manufacturers also shout.
Important to remember it is a 12 layers.
Except jumping into the river, what would be the options?
Thanks.
I am facing trouble with my motherboard again.
I succeeded in having it on 12 layers with vias 4020 for the smallest ones.
The previous version was based on 16 layers with vias 3615 and blind vias: I heard manufacturers shouting that it was not doable or ask for the amount of $85k for 5 prototypes.
Important to say it involved Megtron6 being a little afraid about the loss between MXM GPU and CPU (PCIe).
Megtron6 is very very very expensive and if you can get rid of it, it is a good idea.
After discussion with TI and following an article I found on the web and the length of the DPs of about 30 cm, I can use FR4.
I changed the stackup with a total height of 2,33mm, enlarged the gap for HDMI DPs in order to get a width of 90um.
So everything is above 90um including on BGAs I have with a pitch of 0.5mm and balls of 0.25mm.
I shared this last version yesterday with the first manufacturer.
Answer: NOT DOABLE!
You have to change your drills to 5030 because of the aspect ratio.
2.33/0.2 = 11.65 too high!
Wouaaaahhhhhh.....
I asked to another manufacturer the following questions:
If we consider 2 adjacent vias with different signals,
I would like to know:
- The minimal distance between the border of each via
- The minimal distance between the center of each via
- The minimal annular ring for each via
Drill holes: two cases: 0.2 mm and 0.3 mm
Answer:
For milling the distance is 200um from board edge to copper. However if the boards are in a scored panel then the space is 500um
For 0.2mm the distance is 400um for 0.3mm the distance is 600um
Minimum annular ring is 100um
OK I took 2 adjacent vias 5030 whose centers are distant of 600um, following what I was told.
The annular ring is 100um, OK.
The issue is that the distance between edge copper is 100um and not 200 um.
So there is an issue within the answer I got.
As you can see on the screenshot, the fanout of the CEX module is not obvious because you have DPs between DPs on other layers.
The spacing with the vias is better than 100um.
I cannot change the stackup because if I decrease the total height, the width of DPs will decrease too and go below 90um and perhaps 75um.
Under 75um, the manufacturers also shout.
Important to remember it is a 12 layers.
Except jumping into the river, what would be the options?
Thanks.
qdrives , 09-01-2023, 02:29 PM
1) What if you would ask them for the stackup giving your constraints?
2) Have you tried https://www.isola-group.com/isostack/ ?
2) Have you tried https://www.isola-group.com/isostack/ ?
mulfycrowh , 09-13-2023, 10:23 AM
I finally succeeded in launching the manufacturing of the motherboard.
You can have a distance of 100 um between via copper edge.
The smallest via on the board is 5030 giving a ratio of 8 with a thickness of 2.4.
Budget is no more $85K but $1k2 for 5 prototypes.
i also shared for impedance control the layers involving differential pairs I painted with the matching colors in Photoshop.
You can have a distance of 100 um between via copper edge.
The smallest via on the board is 5030 giving a ratio of 8 with a thickness of 2.4.
Budget is no more $85K but $1k2 for 5 prototypes.
i also shared for impedance control the layers involving differential pairs I painted with the matching colors in Photoshop.
mulfycrowh , 09-14-2023, 03:10 AM
Here is one layer for impedance control.
qdrives , 09-14-2023, 03:33 PM
I would use a different color 'background'. The yellow traces a difficult to follow/find.
jenniferolivia , 10-19-2023, 12:17 AM
It seems like you're encountering some challenges with the design of your motherboard, particularly related to the stackup, via sizes, and other design constraints. Here are some possible solutions and suggestions to address the issues you've described:
Stackup Design:
Since you need to maintain a certain minimum width for your DPs (differential pairs) and can't decrease the total height, consider optimizing your layer stackup. You might explore different layer configurations to achieve your desired width while keeping the total height within limits.
Consult with an experienced PCB designer to fine-tune the stackup to ensure the right balance between signal integrity and manufacturing feasibility.
Via Size and Aspect Ratio:
If the aspect ratio of your vias is causing manufacturing issues, you may need to redesign the board to accommodate larger vias (5030, as suggested by the manufacturer).
Ensure that the annular ring and other design parameters are within manufacturing tolerances.
Differential Pair Spacing:
The spacing between the vias for your differential pairs is crucial for signal integrity. Make sure that the spacing between them is consistent with the design requirements for your specific signals.
You may need to reroute traces or adjust the placement of components to meet these requirements.
Manufacturer Selection:
Consider exploring other PCB manufacturers. Not all manufacturers have the same capabilities and limitations. Some might be better equipped to handle the specific requirements of your design.
Expert Consultation:
Engage with a PCB design expert or consultant who specializes in high-speed and complex PCB designs. They can provide valuable insights and recommendations for your specific design challenges.
Material Selection:
Evaluate different PCB materials. You mentioned using Megtron6, which is expensive. Investigate other materials that might be more cost-effective while still meeting your signal integrity requirements.
Design Iteration:
Be prepared for multiple design iterations. It's common for complex PCB designs to go through several revisions to fine-tune the layout and meet manufacturing constraints.
Manufacturability Analysis:
Before finalizing your design, conduct a thorough manufacturability analysis to ensure that it aligns with the capabilities of your chosen manufacturer.
Communication:
Maintain open and clear communication with your PCB manufacturer. Discuss your concerns and issues with them. They might provide additional insights and suggestions to overcome the challenges.
Consider Design Alternatives:
If all else fails, you might need to consider alternative designs, including reducing the complexity of your board or revisiting the choice of components to simplify the layout.
It's important to note that complex PCB designs, especially those involving high-speed signals, often require a balance between performance and manufacturability. Working closely with experienced PCB designers and manufacturers can help you find the best solutions to your specific challenges.
Stackup Design:
Since you need to maintain a certain minimum width for your DPs (differential pairs) and can't decrease the total height, consider optimizing your layer stackup. You might explore different layer configurations to achieve your desired width while keeping the total height within limits.
Consult with an experienced PCB designer to fine-tune the stackup to ensure the right balance between signal integrity and manufacturing feasibility.
Via Size and Aspect Ratio:
If the aspect ratio of your vias is causing manufacturing issues, you may need to redesign the board to accommodate larger vias (5030, as suggested by the manufacturer).
Ensure that the annular ring and other design parameters are within manufacturing tolerances.
Differential Pair Spacing:
The spacing between the vias for your differential pairs is crucial for signal integrity. Make sure that the spacing between them is consistent with the design requirements for your specific signals.
You may need to reroute traces or adjust the placement of components to meet these requirements.
Manufacturer Selection:
Consider exploring other PCB manufacturers. Not all manufacturers have the same capabilities and limitations. Some might be better equipped to handle the specific requirements of your design.
Expert Consultation:
Engage with a PCB design expert or consultant who specializes in high-speed and complex PCB designs. They can provide valuable insights and recommendations for your specific design challenges.
Material Selection:
Evaluate different PCB materials. You mentioned using Megtron6, which is expensive. Investigate other materials that might be more cost-effective while still meeting your signal integrity requirements.
Design Iteration:
Be prepared for multiple design iterations. It's common for complex PCB designs to go through several revisions to fine-tune the layout and meet manufacturing constraints.
Manufacturability Analysis:
Before finalizing your design, conduct a thorough manufacturability analysis to ensure that it aligns with the capabilities of your chosen manufacturer.
Communication:
Maintain open and clear communication with your PCB manufacturer. Discuss your concerns and issues with them. They might provide additional insights and suggestions to overcome the challenges.
Consider Design Alternatives:
If all else fails, you might need to consider alternative designs, including reducing the complexity of your board or revisiting the choice of components to simplify the layout.
It's important to note that complex PCB designs, especially those involving high-speed signals, often require a balance between performance and manufacturability. Working closely with experienced PCB designers and manufacturers can help you find the best solutions to your specific challenges.
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