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OrCAD and Cadence Allegro
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ORCAD CIS/CIP
Started by
GEORGE_CH
, 12-04-2024, 02:41 PM
0 Responses. Latest response by
GEORGE_CH
, 12-04-2024, 02:41 PM
Orcad Allegro footprint pad filled copper view
Started by
GEORGE_CH
, 11-09-2024, 11:35 AM
1 Responses. Latest response by
GEORGE_CH
, 11-09-2024, 09:25 PM
Orcad PCB dimensions increase and coordinates impact
Started by
GEORGE_CH
, 11-05-2024, 02:01 PM
1 Responses. Latest response by
GEORGE_CH
, 11-06-2024, 11:18 AM
OrCad GND shape (Polygon) clearance not working
Started by
Geo
, 09-30-2024, 07:39 PM
3 Responses. Latest response by
Geo
, 09-30-2024, 09:23 PM
physical constraint rules in allegro?
Started by
wenyuan
, 09-28-2024, 02:57 AM
0 Responses. Latest response by
wenyuan
, 09-28-2024, 02:57 AM
Connection Points
Started by
PMICnewbie
, 09-25-2024, 09:26 PM
5 Responses. Latest response by
Robert Feranec
, 09-27-2024, 06:39 AM
Need BOM excel file
Started by
PMICnewbie
, 09-18-2024, 09:46 PM
2 Responses. Latest response by
PMICnewbie
, 09-19-2024, 09:49 PM
Hi, @Robert Feranec
Started by
govind vijayan
, 08-13-2024, 10:03 AM
1 Responses. Latest response by
Robert Feranec
, 08-13-2024, 01:29 PM
Cannot find Padstack Editor
Started by
uds
, 07-27-2024, 04:29 AM
0 Responses. Latest response by
uds
, 07-27-2024, 04:29 AM
Need DDR4 Reference Board file in allegro
Started by
kabaleeswaran
, 07-24-2024, 11:03 AM
2 Responses. Latest response by
Robert Feranec
, 07-24-2024, 04:24 PM
Orcad X tutorials in the future?
Started by
, 07-23-2024, 12:16 PM
1 Responses. Latest response by
Robert Feranec
, 07-23-2024, 02:42 PM
Is it possible to create teardrops/fillets in OrCAD PCB Designer Standard 17.4?
Started by
vajranaga
, 05-06-2024, 04:20 PM
0 Responses. Latest response by
vajranaga
, 05-06-2024, 04:20 PM
Automatic Routing capabilites
Started by
PMICnewbie
, 04-04-2024, 04:49 AM
7 Responses. Latest response by
Robert Feranec
, 04-06-2024, 06:51 AM
Automatic Routing capacbilites
Started by
PMICnewbie
, 04-04-2024, 04:49 AM
2 Responses. Latest response by
SirJames
, 04-04-2024, 03:57 PM
Cheat sheet for shortcut keys for Allegro PCB
Started by
PMICnewbie
, 03-29-2024, 02:55 PM
26 Responses. Latest response by
PMICnewbie
, 04-01-2024, 06:10 AM
Allegro DRC rules
Started by
PMICnewbie
, 03-24-2024, 08:12 AM
2 Responses. Latest response by
PMICnewbie
, 03-25-2024, 05:27 PM
PCB Footprint Mistakes
Started by
Ashok Reddy
, 03-21-2024, 07:00 AM
3 Responses. Latest response by
Ashok Reddy
, 03-23-2024, 01:32 PM
allegro to altium problem
Started by
joshua
, 03-15-2024, 12:00 PM
5 Responses. Latest response by
joshua
, 03-16-2024, 01:39 PM
Regarding Component placement after changing Library directory
Started by
PMICnewbie
, 02-28-2024, 12:20 AM
2 Responses. Latest response by
PMICnewbie
, 02-28-2024, 05:17 PM
Usage of Offpage Connectors
Started by
PMICnewbie
, 02-12-2024, 10:45 PM
4 Responses. Latest response by
Robert Feranec
, 02-14-2024, 05:20 AM
Multiple net aliases in same form
Started by
PMICnewbie
, 02-12-2024, 10:39 PM
2 Responses. Latest response by
PMICnewbie
, 02-13-2024, 10:55 AM
When Choosing Vendor Model Display Sizes
Started by
PMICnewbie
, 02-13-2024, 12:50 AM
3 Responses. Latest response by
PMICnewbie
, 02-13-2024, 11:05 AM
Altium to Allegro Libraries
Started by
Lakshmanabalakrishnan R
, 02-09-2024, 09:43 AM
2 Responses. Latest response by
Lakshmanabalakrishnan R
, 02-12-2024, 06:58 AM
Two instances of ORCAD allegro
Started by
PMICnewbie
, 02-08-2024, 08:18 PM
2 Responses. Latest response by
PMICnewbie
, 02-11-2024, 01:45 AM
power trace width
Started by
wenyuan
, 02-02-2024, 11:49 AM
3 Responses. Latest response by
QDrives
, 02-02-2024, 05:02 PM
Allegro highlighting a group of signals in different layers
Started by
thomas_ee
, 10-01-2023, 04:40 AM
0 Responses. Latest response by
thomas_ee
, 10-01-2023, 04:40 AM
Cadance CIS capture hierarchical block
Started by
Lenin Babu
, 08-18-2023, 01:19 AM
2 Responses. Latest response by
Kabaleeswaran
, 09-05-2023, 08:09 AM
Layout Block
Started by
Shahriar sakib
, 06-03-2023, 07:31 AM
2 Responses. Latest response by
Shahriar sakib
, 06-05-2023, 07:58 AM
DXF not able to import in cadence allegro ?
Started by
Kabaleeswaran
, 05-26-2023, 12:00 PM
1 Responses. Latest response by
robertferanec
, 05-27-2023, 01:47 AM
Intertool communication between Capture CIS and PCB Editor in 17.4 Version
Started by
Samudralankaiah
, 05-23-2023, 11:55 PM
1 Responses. Latest response by
Kabaleeswaran
, 05-26-2023, 12:33 PM
Foorprint is not updated from pcb_package properties in Cadence CIS 22.1
Started by
rdpdo
, 05-17-2023, 10:57 AM
3 Responses. Latest response by
rdpdo
, 05-19-2023, 03:47 AM
For those who got bug with part manager in Orcad capture - solution
Started by
rdpdo
, 05-02-2023, 07:33 AM
0 Responses. Latest response by
rdpdo
, 05-02-2023, 07:33 AM
Error in Workflow
Started by
Shahriar sakib
, 04-09-2023, 01:19 AM
3 Responses. Latest response by
robertferanec
, 04-24-2023, 04:36 AM
How to measure in Allegro Viewer ?
Started by
pal
, 04-17-2023, 12:33 PM
1 Responses. Latest response by
robertferanec
, 04-18-2023, 08:54 AM
Symbol Type filter during decoupling capacitor placement under BGA
Started by
znp2015
, 03-07-2023, 07:11 AM
2 Responses. Latest response by
robertferanec
, 03-08-2023, 07:51 AM
Allegro Shortcut Key's.
Started by
Abdullah Ansari
, 10-09-2022, 06:38 AM
2 Responses. Latest response by
Abdullah Ansari
, 02-22-2023, 02:57 AM
allegro
Started by
Manjunath K
, 01-02-2023, 12:09 AM
5 Responses. Latest response by
Abdullah Ansari
, 02-22-2023, 02:52 AM
Unexplained ratsnest on Import/Logic
Started by
mstamler
, 01-19-2023, 07:56 AM
3 Responses. Latest response by
Abdullah Ansari
, 02-22-2023, 02:48 AM
Why is a stock hole120 padstack in 17.4 showing a drill of 12 inches?
Started by
ajawamnet
, 12-24-2022, 08:37 AM
1 Responses. Latest response by
robertferanec
, 01-02-2023, 02:04 AM
*Error* quotient: Attempted to divide by zero
Started by
Shahriar sakib
, 10-28-2022, 01:06 PM
3 Responses. Latest response by
robertferanec
, 11-12-2022, 02:30 AM
Misaligned PCB Trace
Started by
mstamler
, 09-22-2022, 05:20 AM
1 Responses. Latest response by
robertferanec
, 09-22-2022, 05:25 AM
How to learn orcad and cadence allegro
Started by
karimoviç
, 09-01-2022, 06:34 AM
1 Responses. Latest response by
robertferanec
, 09-01-2022, 10:48 AM
Creating mechanical hole without warnings
Started by
Piotr
, 08-17-2022, 01:13 AM
1 Responses. Latest response by
robertferanec
, 08-18-2022, 08:50 AM
Questions about Vias and Traces
Started by
samman1
, 08-17-2022, 06:17 AM
1 Responses. Latest response by
robertferanec
, 08-18-2022, 08:54 AM
Padstack Editor - difference between Mechanical Hole, Tooling Hole, Mounting Hole
Started by
Piotr
, 08-03-2022, 11:41 PM
2 Responses. Latest response by
robertferanec
, 08-06-2022, 03:04 AM
Problem with rectangular slot and connecting to copper pour
Started by
STlotus
, 07-11-2022, 02:34 AM
3 Responses. Latest response by
robertferanec
, 07-22-2022, 08:44 AM
OrCAD can't display via properly
Started by
Piotr
, 06-28-2022, 07:18 AM
9 Responses. Latest response by
Piotr
, 07-12-2022, 05:57 AM
signal and power integrity simulation
Started by
Mohammad
, 07-05-2022, 02:39 AM
1 Responses. Latest response by
robertferanec
, 07-09-2022, 03:29 AM
DRC Error Package Keepout Error.
Started by
ntalukder
, 07-08-2022, 05:23 AM
2 Responses. Latest response by
robertferanec
, 07-09-2022, 03:37 AM
Learn OrCAD and Allegro Essentials - Lesson 8 - pads are grey
Started by
Piotr
, 06-27-2022, 04:39 AM
1 Responses. Latest response by
Piotr
, 06-27-2022, 05:43 AM
Calculation of differential pair impedance
Started by
Mohammad
, 06-13-2022, 05:50 AM
3 Responses. Latest response by
robertferanec
, 06-14-2022, 01:17 AM
Allegro PCB first configuration after instalation
Started by
adamS90
, 03-03-2022, 12:17 PM
3 Responses. Latest response by
robertferanec
, 03-26-2022, 02:11 AM
Component library
Started by
Shahriar sakib
, 03-08-2022, 11:04 AM
2 Responses. Latest response by
robertferanec
, 03-18-2022, 03:10 AM
Could Not Launch Footprint
Started by
brucesun
, 03-13-2020, 08:20 AM
5 Responses. Latest response by
robertferanec
, 03-03-2022, 05:38 AM
Copper thieving in allegro
Started by
Dharitri
, 02-22-2022, 12:57 AM
1 Responses. Latest response by
robertferanec
, 02-24-2022, 05:50 AM
creating fanout for BGA package
Started by
Manjunath K
, 02-08-2022, 11:42 PM
1 Responses. Latest response by
robertferanec
, 02-12-2022, 01:11 AM
Community support for Cadence
Started by
chitransh92
, 11-24-2021, 04:01 AM
1 Responses. Latest response by
robertferanec
, 11-29-2021, 08:13 AM
Copy Fanout - OrCAD Standard
Started by
Piotr
, 10-26-2021, 03:43 AM
5 Responses. Latest response by
robertferanec
, 11-01-2021, 02:24 AM
Need to move existing component by 100mills downwards
Started by
Dharitri
, 10-06-2021, 11:25 PM
3 Responses. Latest response by
robertferanec
, 10-11-2021, 05:28 AM
Mr Manjunath K
Started by
Manjunath K
, 07-22-2021, 07:42 AM
10 Responses. Latest response by
robertferanec
, 10-05-2021, 11:20 PM
Cross probing movement in Allegro 16.3
Started by
aerdim
, 08-18-2021, 02:33 AM
9 Responses. Latest response by
Manjunath K
, 08-30-2021, 08:27 AM
Allegro/ORCAD training course
Started by
rahnkt
, 04-30-2021, 05:47 AM
25 Responses. Latest response by
rahnkt
, 08-11-2021, 10:04 AM
Design Query
Started by
Guddanti Mohit
, 08-09-2021, 11:26 PM
1 Responses. Latest response by
robertferanec
, 08-11-2021, 04:29 AM
Allegro PCB Design DIE package based
Started by
Guddanti Mohit
, 07-20-2021, 03:22 AM
1 Responses. Latest response by
robertferanec
, 07-20-2021, 04:53 AM
Sigrity topology explorer
Started by
Parifar
, 06-09-2021, 04:50 AM
2 Responses. Latest response by
Parifar
, 06-15-2021, 12:28 AM
DRC Error
Started by
M. Namvar
, 05-09-2021, 11:21 PM
3 Responses. Latest response by
M. Namvar
, 05-19-2021, 03:17 AM
Allegro PCB team design
Started by
Vidya
, 03-12-2021, 06:24 AM
2 Responses. Latest response by
przemek
, 03-15-2021, 08:09 AM
Mounting holes with grounding
Started by
marco_svizzeri
, 03-09-2021, 12:48 AM
2 Responses. Latest response by
robertferanec
, 03-11-2021, 04:40 AM
Cadence Allegro Course
Started by
anish7015
, 03-09-2021, 05:19 PM
2 Responses. Latest response by
anish7015
, 03-11-2021, 11:11 AM
Complex PCB Boards!
Started by
GCopper
, 01-26-2021, 02:23 PM
1 Responses. Latest response by
robertferanec
, 02-01-2021, 03:17 AM
Some Layer's visibility missing.
Started by
GCopper
, 01-28-2021, 01:14 PM
2 Responses. Latest response by
robertferanec
, 02-01-2021, 03:30 AM
Netlist Error.
Started by
GCopper
, 01-17-2021, 09:29 PM
10 Responses. Latest response by
robertferanec
, 01-20-2021, 12:38 AM
Capture startup
Started by
w2fdr
, 01-05-2021, 12:43 AM
3 Responses. Latest response by
robertferanec
, 01-11-2021, 01:43 AM
Sigrity write leveling
Started by
bossssie
, 01-06-2021, 01:42 AM
1 Responses. Latest response by
robertferanec
, 01-11-2021, 01:29 AM
Advance PCB Layout Course with Cadence Allegro!
Started by
GCopper
, 12-15-2020, 10:51 PM
7 Responses. Latest response by
robertferanec
, 01-06-2021, 12:50 AM
Schematic and PCB tabs.
Started by
GCopper
, 12-13-2020, 06:25 PM
4 Responses. Latest response by
GCopper
, 12-18-2020, 01:35 PM
Allegro Project manager
Started by
GCopper
, 12-09-2020, 11:04 PM
2 Responses. Latest response by
GCopper
, 12-13-2020, 06:13 PM
Setting shape on conductor layer to have shape to via clearance
Started by
msapack
, 12-10-2020, 06:37 PM
1 Responses. Latest response by
robertferanec
, 12-11-2020, 08:04 AM
allegro 16.6 installation problem
Started by
, 08-22-2019, 04:18 AM
6 Responses. Latest response by
robertferanec
, 12-02-2020, 03:11 AM
IBIS File error
Started by
GeoKnight
, 11-28-2020, 04:27 AM
1 Responses. Latest response by
robertferanec
, 11-30-2020, 04:37 AM
SPDLinks.exe not working
Started by
GeoKnight
, 11-18-2020, 03:59 AM
1 Responses. Latest response by
robertferanec
, 11-20-2020, 08:26 AM
Multiboard PCB design in Orcad
Started by
rajasekaran
, 11-11-2020, 12:45 AM
1 Responses. Latest response by
robertferanec
, 11-13-2020, 04:08 AM
PCB Design conversion from Allegro 17.2 to Allegro 16.6
Started by
stanley
, 10-15-2020, 09:52 PM
2 Responses. Latest response by
stanley
, 10-16-2020, 08:51 PM
how to route free running clock differential signals in BGA package
Started by
Samudralankaiah
, 10-08-2020, 10:34 AM
1 Responses. Latest response by
robertferanec
, 10-12-2020, 08:46 AM
FLASH symbol for oblong pads
Started by
brucesun
, 09-08-2020, 12:59 PM
4 Responses. Latest response by
brucesun
, 09-14-2020, 08:05 AM
"Save part as" in orcad 17.4 Problem
Started by
M. Namvar
, 08-11-2020, 09:44 PM
2 Responses. Latest response by
M. Namvar
, 08-17-2020, 03:43 AM
Basic terminology
Started by
ricky
, 08-06-2020, 09:33 AM
1 Responses. Latest response by
robertferanec
, 08-07-2020, 06:04 AM
Problem with skill in PCB Editor
Started by
phancong
, 08-12-2019, 09:10 PM
2 Responses. Latest response by
mir0mik
, 05-06-2020, 03:57 PM
Xnet creation in Allegro
Started by
Abdullah
, 04-14-2020, 07:11 AM
2 Responses. Latest response by
Abdullah
, 04-15-2020, 01:46 AM
Asking about DDR3 Fly-by Topology Matching Length
Started by
CamDoan
, 04-13-2020, 03:30 PM
1 Responses. Latest response by
robertferanec
, 04-14-2020, 12:04 PM
How to add mechanical symbol to a footprint
Started by
brucesun
, 04-09-2020, 08:19 AM
1 Responses. Latest response by
brucesun
, 04-09-2020, 08:49 PM
Heterogeneous Symbol In OrCAD Capture.
Started by
brucesun
, 04-02-2020, 07:50 PM
10 Responses. Latest response by
brucesun
, 04-08-2020, 09:15 AM
Cadence Sigrity
Started by
Armin
, 04-05-2020, 10:24 PM
1 Responses. Latest response by
robertferanec
, 04-07-2020, 08:39 AM
symbol of altium to Orcad
Started by
j21
, 03-18-2020, 08:38 AM
1 Responses. Latest response by
robertferanec
, 03-20-2020, 03:27 AM
Customized assembly drawing : Component Value displayed
Started by
SHR007
, 03-05-2020, 05:30 AM
1 Responses. Latest response by
robertferanec
, 03-09-2020, 12:46 AM
Finding NMOS 0.5u technology
Started by
andrewmiingi
, 03-06-2020, 11:34 AM
1 Responses. Latest response by
robertferanec
, 03-09-2020, 01:43 AM
Cannnot assign a PCB footprint to a schematic symbol
Started by
flair4ever
, 07-22-2019, 03:43 PM
2 Responses. Latest response by
flair4ever
, 02-18-2020, 02:46 PM
Conversion file
Started by
cometa
, 01-21-2020, 05:14 AM
1 Responses. Latest response by
robertferanec
, 01-21-2020, 05:24 AM
Gerber file warning
Started by
asa1986
, 12-28-2019, 04:47 AM
1 Responses. Latest response by
robertferanec
, 12-30-2019, 04:05 AM
problem with logo in allegro 17.2
Started by
asa1986
, 12-09-2019, 10:46 PM
2 Responses. Latest response by
asa1986
, 12-10-2019, 02:21 AM
Gerber File Edit
Started by
brucesun
, 11-27-2019, 08:27 AM
3 Responses. Latest response by
robertferanec
, 12-04-2019, 12:34 PM
Database Part
Started by
chinmaymayee
, 11-06-2019, 05:59 AM
8 Responses. Latest response by
robertferanec
, 11-15-2019, 12:04 AM
Resistor Error when Saving
Started by
anish7015
, 09-18-2019, 12:56 PM
3 Responses. Latest response by
anish7015
, 09-20-2019, 11:08 AM
Copy creates pastemask pin on bottom and not top layer
Started by
SHR007
, 09-02-2019, 07:57 AM
1 Responses. Latest response by
robertferanec
, 09-03-2019, 08:18 AM
the icon "part propertie" is unhitched
Started by
ham
, 09-03-2019, 05:01 AM
1 Responses. Latest response by
robertferanec
, 09-03-2019, 11:41 PM
Import Netlist failed to include fiducials
Started by
SHR007
, 05-20-2019, 11:08 PM
5 Responses. Latest response by
robertferanec
, 09-01-2019, 12:14 PM
RF PCB DESIGN
Started by
, 08-01-2019, 05:04 AM
3 Responses. Latest response by
robertferanec
, 08-09-2019, 08:25 AM
Is there any way to copy all routing and placements between boards?
Started by
, 08-05-2019, 06:18 AM
1 Responses. Latest response by
robertferanec
, 08-06-2019, 08:27 AM
Export logo company .ai to allegro
Started by
Juan
, 01-30-2018, 02:31 AM
10 Responses. Latest response by
, 08-05-2019, 06:11 AM
Export IPC2581 error on silkscreen layer
Started by
msapack
, 06-20-2019, 11:26 AM
1 Responses. Latest response by
robertferanec
, 06-24-2019, 08:45 AM
logo issues
Started by
edward
, 05-16-2019, 09:25 PM
13 Responses. Latest response by
robertferanec
, 06-09-2019, 02:16 AM
silkscreen doesn't display in 3D viewer
Started by
MrSun
, 05-19-2019, 04:04 AM
6 Responses. Latest response by
robertferanec
, 05-24-2019, 06:38 AM
Warning message in exporting gerber
Started by
MrSun
, 05-14-2019, 05:33 AM
3 Responses. Latest response by
robertferanec
, 05-16-2019, 02:20 AM
Problem in making gerber file in Allegro 17.2
Started by
Armin
, 04-14-2019, 05:25 AM
7 Responses. Latest response by
robertferanec
, 05-05-2019, 10:32 AM
Problem with moving via
Started by
MrSun
, 05-01-2019, 03:53 AM
2 Responses. Latest response by
MrSun
, 05-02-2019, 02:16 AM
Warning message in importing netlist
Started by
edward
, 04-16-2019, 11:07 AM
3 Responses. Latest response by
robertferanec
, 04-25-2019, 05:13 AM
Cadence Allegro 17.2 Design Entry HDL
Started by
mohsin_qau
, 04-08-2019, 05:08 AM
1 Responses. Latest response by
robertferanec
, 04-12-2019, 01:37 AM
OrCAD Capture CIS 17.2 part propertier can't edit
Started by
MrSun
, 04-11-2019, 08:28 AM
3 Responses. Latest response by
robertferanec
, 04-12-2019, 03:42 AM
Mounting hole footprint
Started by
rajasekaran
, 04-03-2019, 02:48 AM
1 Responses. Latest response by
robertferanec
, 04-08-2019, 01:17 AM
Calculating the footprint dimensions
Started by
rajasekaran
, 04-02-2019, 03:15 AM
2 Responses. Latest response by
rajasekaran
, 04-03-2019, 01:48 AM
Allegro to Solid
Started by
Armin
, 01-12-2019, 05:19 AM
12 Responses. Latest response by
Armin
, 03-19-2019, 01:44 AM
MT41J128M16HA-15E:D TR footprint
Started by
oliv000
, 10-10-2018, 11:53 PM
3 Responses. Latest response by
anovickis
, 03-12-2019, 11:07 AM
Changing a packaged IC by its bare die in a schematic on Cadence Allegro
Started by
mauriciocarlotto
, 02-18-2019, 07:32 AM
2 Responses. Latest response by
anovickis
, 03-01-2019, 09:40 AM
Oblong Drill in Allegro 17.2
Started by
Armin
, 02-21-2019, 04:24 AM
2 Responses. Latest response by
Armin
, 02-22-2019, 09:29 PM
Down version to 16.6
Started by
Armin
, 02-13-2019, 02:18 AM
4 Responses. Latest response by
Armin
, 02-15-2019, 11:17 PM
Importing parts from digikey like in altium ?
Started by
eyalb
, 02-10-2019, 07:32 AM
1 Responses. Latest response by
robertferanec
, 02-13-2019, 12:13 PM
Simulation in the Cadence Signal Integrity
Started by
mohsin_qau
, 02-04-2019, 12:49 PM
4 Responses. Latest response by
robertferanec
, 02-11-2019, 04:29 AM
Making BOM with our template in Allegro
Started by
Armin
, 12-04-2018, 09:53 PM
2 Responses. Latest response by
Armin
, 12-07-2018, 09:51 PM
Allegro Productivity Toolbox
Started by
Jared
, 11-29-2018, 05:37 PM
1 Responses. Latest response by
robertferanec
, 12-04-2018, 07:13 AM
Import netlist for schematic (Capture)
Started by
Jared
, 12-01-2018, 09:04 PM
1 Responses. Latest response by
robertferanec
, 12-04-2018, 07:41 AM
RF components footprints with grounded vias
Started by
maxg31
, 11-07-2018, 09:47 AM
6 Responses. Latest response by
Paul van Avesaath
, 11-19-2018, 12:33 AM
Creat Part in capture
Started by
Jared
, 10-27-2018, 03:47 AM
4 Responses. Latest response by
Jared
, 11-08-2018, 09:52 AM
Change color RefDes and Symbol
Started by
Jared
, 10-27-2018, 10:22 AM
3 Responses. Latest response by
robertferanec
, 11-08-2018, 01:05 AM
Coplanar Waveguide Grounded In Orcad PCB
Started by
maxg31
, 10-29-2018, 03:55 AM
2 Responses. Latest response by
maxg31
, 11-05-2018, 12:34 AM
Draw Schematic in capture
Started by
Jared
, 10-27-2018, 05:30 AM
1 Responses. Latest response by
robertferanec
, 10-31-2018, 06:59 AM
Include cource files.
Started by
Stepan
, 10-09-2018, 11:18 AM
2 Responses. Latest response by
Stepan
, 10-11-2018, 03:01 AM
Selection of specific parts in schematic
Started by
joe_ls
, 07-12-2018, 04:59 PM
3 Responses. Latest response by
joe_ls
, 07-13-2018, 06:43 AM
Few clarifications needed in orcad and cadence allegro based on your videos.
Started by
vijunair
, 04-24-2018, 08:39 AM
25 Responses. Latest response by
robertferanec
, 06-03-2018, 11:05 AM
Shortcuts and FuncKeys for beginners
Started by
joe_ls
, 05-16-2018, 06:45 AM
0 Responses. Latest response by
joe_ls
, 05-16-2018, 06:45 AM
Script to export DXF and OBD
Started by
Eugene
, 05-13-2018, 08:12 PM
2 Responses. Latest response by
Eugene
, 05-14-2018, 08:13 PM
Editing an existing layout
Started by
Sibi
, 05-08-2018, 12:15 PM
1 Responses. Latest response by
robertferanec
, 05-08-2018, 04:58 PM
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